Commit 875ff9a7 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amdgpu: support for gc_info table v1.3 



Add gc_info table v1.3 for IP discovery.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 73dd0ad9

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+11 −0
Original line number Diff line number Diff line
@@ -1500,6 +1500,7 @@ union gc_info { 
	struct gc_info_v1_0 v1;

	struct gc_info_v1_1 v1_1;

	struct gc_info_v1_2 v1_2;

	struct gc_info_v1_3 v1_3;

	struct gc_info_v2_0 v2;

	struct gc_info_v2_1 v2_1;

};
@@ -1558,6 +1559,16 @@ static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) 
			adev->gfx.config.gc_gl1c_size_per_instance = le32_to_cpu(gc_info->v1_2.gc_gl1c_size_per_instance);

			adev->gfx.config.gc_gl2c_per_gpu = le32_to_cpu(gc_info->v1_2.gc_gl2c_per_gpu);

		}

		if (le16_to_cpu(gc_info->v1.header.version_minor) >= 3) {

			adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v1_3.gc_tcp_size_per_cu);

			adev->gfx.config.gc_tcp_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcp_cache_line_size);

			adev->gfx.config.gc_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_instruction_cache_size_per_sqc);

			adev->gfx.config.gc_instruction_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_instruction_cache_line_size);

			adev->gfx.config.gc_scalar_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cache_size_per_sqc);

			adev->gfx.config.gc_scalar_data_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cache_line_size);

			adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v1_3.gc_tcc_size);

			adev->gfx.config.gc_tcc_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcc_cache_line_size);

		}

		break;

	case 2:

		adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

+6 −0
Original line number Diff line number Diff line
@@ -245,6 +245,12 @@ struct amdgpu_gfx_config { 
	uint32_t gc_tcp_size_per_cu;

	uint32_t gc_num_cu_per_sqc;

	uint32_t gc_tcc_size;

	uint32_t gc_tcp_cache_line_size;

	uint32_t gc_instruction_cache_size_per_sqc;

	uint32_t gc_instruction_cache_line_size;

	uint32_t gc_scalar_data_cache_size_per_sqc;

	uint32_t gc_scalar_data_cache_line_size;

	uint32_t gc_tcc_cache_line_size;

};



struct amdgpu_cu_info {

drivers/gpu/drm/amd/include/discovery.h

+42 −0
Original line number Diff line number Diff line
@@ -258,6 +258,48 @@ struct gc_info_v1_2 { 
	uint32_t gc_gl2c_per_gpu;

};



struct gc_info_v1_3 {

    struct gpu_info_header header;

    uint32_t gc_num_se;

    uint32_t gc_num_wgp0_per_sa;

    uint32_t gc_num_wgp1_per_sa;

    uint32_t gc_num_rb_per_se;

    uint32_t gc_num_gl2c;

    uint32_t gc_num_gprs;

    uint32_t gc_num_max_gs_thds;

    uint32_t gc_gs_table_depth;

    uint32_t gc_gsprim_buff_depth;

    uint32_t gc_parameter_cache_depth;

    uint32_t gc_double_offchip_lds_buffer;

    uint32_t gc_wave_size;

    uint32_t gc_max_waves_per_simd;

    uint32_t gc_max_scratch_slots_per_cu;

    uint32_t gc_lds_size;

    uint32_t gc_num_sc_per_se;

    uint32_t gc_num_sa_per_se;

    uint32_t gc_num_packer_per_sc;

    uint32_t gc_num_gl2a;

    uint32_t gc_num_tcp_per_sa;

    uint32_t gc_num_sdp_interface;

    uint32_t gc_num_tcps;

    uint32_t gc_num_tcp_per_wpg;

    uint32_t gc_tcp_l1_size;

    uint32_t gc_num_sqc_per_wgp;

    uint32_t gc_l1_instruction_cache_size_per_sqc;

    uint32_t gc_l1_data_cache_size_per_sqc;

    uint32_t gc_gl1c_per_sa;

    uint32_t gc_gl1c_size_per_instance;

    uint32_t gc_gl2c_per_gpu;

    uint32_t gc_tcp_size_per_cu;

    uint32_t gc_tcp_cache_line_size;

    uint32_t gc_instruction_cache_size_per_sqc;

    uint32_t gc_instruction_cache_line_size;

    uint32_t gc_scalar_data_cache_size_per_sqc;

    uint32_t gc_scalar_data_cache_line_size;

    uint32_t gc_tcc_size;

    uint32_t gc_tcc_cache_line_size;

};



struct gc_info_v2_0 {

	struct gpu_info_header header;