Loading drivers/ide/aec62xx.c +5 −5 Original line number Diff line number Diff line Loading @@ -81,15 +81,15 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entr return chipset_table->ultra_settings; } static void aec6210_set_mode(ide_drive_t *drive, const u8 speed) static void aec6210_set_mode(ide_hwif_t *hwif, ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; struct pci_dev *dev = to_pci_dev(hwif->dev); struct ide_host *host = pci_get_drvdata(dev); struct chipset_bus_clock_list_entry *bus_clock = host->host_priv; u16 d_conf = 0; u8 ultra = 0, ultra_conf = 0; u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; const u8 speed = drive->dma_mode; unsigned long flags; local_irq_save(flags); Loading @@ -109,15 +109,15 @@ static void aec6210_set_mode(ide_drive_t *drive, const u8 speed) local_irq_restore(flags); } static void aec6260_set_mode(ide_drive_t *drive, const u8 speed) static void aec6260_set_mode(ide_hwif_t *hwif, ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; struct pci_dev *dev = to_pci_dev(hwif->dev); struct ide_host *host = pci_get_drvdata(dev); struct chipset_bus_clock_list_entry *bus_clock = host->host_priv; u8 unit = drive->dn & 1; u8 tmp1 = 0, tmp2 = 0; u8 ultra = 0, drive_conf = 0, ultra_conf = 0; const u8 speed = drive->dma_mode; unsigned long flags; local_irq_save(flags); Loading @@ -137,7 +137,7 @@ static void aec6260_set_mode(ide_drive_t *drive, const u8 speed) static void aec_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) { drive->dma_mode = drive->pio_mode; hwif->port_ops->set_dma_mode(drive, drive->dma_mode); hwif->port_ops->set_dma_mode(hwif, drive); } static int init_chipset_aec62xx(struct pci_dev *dev) Loading drivers/ide/alim15x3.c +3 −3 Original line number Diff line number Diff line Loading @@ -121,16 +121,16 @@ static u8 ali_udma_filter(ide_drive_t *drive) /** * ali_set_dma_mode - set host controller for DMA mode * @hwif: port * @drive: drive * @speed: DMA mode * * Configure the hardware for the desired IDE transfer mode. */ static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; struct pci_dev *dev = to_pci_dev(hwif->dev); const u8 speed = drive->dma_mode; u8 speed1 = speed; u8 unit = drive->dn & 1; u8 tmpbyte = 0x00; Loading drivers/ide/amd74xx.c +4 −3 Original line number Diff line number Diff line Loading @@ -79,14 +79,14 @@ static void amd_set_speed(struct pci_dev *dev, u8 dn, u8 udma_mask, * to a desired transfer mode. It also can be called by upper layers. */ static void amd_set_drive(ide_drive_t *drive, const u8 speed) static void amd_set_drive(ide_hwif_t *hwif, ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; struct pci_dev *dev = to_pci_dev(hwif->dev); ide_drive_t *peer = ide_get_pair_dev(drive); struct ide_timing t, p; int T, UT; u8 udma_mask = hwif->ultra_mask; const u8 speed = drive->dma_mode; T = 1000000000 / amd_clock; UT = (udma_mask == ATA_UDMA2) ? T : (T / 2); Loading @@ -110,7 +110,8 @@ static void amd_set_drive(ide_drive_t *drive, const u8 speed) static void amd_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) { amd_set_drive(drive, drive->pio_mode); drive->dma_mode = drive->pio_mode; amd_set_drive(hwif, drive); } static void amd7409_cable_detect(struct pci_dev *dev) Loading drivers/ide/atiixp.c +4 −3 Original line number Diff line number Diff line Loading @@ -75,21 +75,22 @@ static void atiixp_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) /** * atiixp_set_dma_mode - set host controller for DMA mode * @hwif: port * @drive: drive * @speed: DMA mode * * Set a ATIIXP host controller to the desired DMA mode. This involves * programming the right timing data into the PCI configuration space. */ static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed) static void atiixp_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) { struct pci_dev *dev = to_pci_dev(drive->hwif->dev); struct pci_dev *dev = to_pci_dev(hwif->dev); unsigned long flags; int timing_shift = (drive->dn ^ 1) * 8; u32 tmp32; u16 tmp16; u16 udma_ctl = 0; const u8 speed = drive->dma_mode; spin_lock_irqsave(&atiixp_lock, flags); Loading drivers/ide/au1xxx-ide.c +2 −2 Original line number Diff line number Diff line Loading @@ -160,11 +160,11 @@ static void au1xxx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) au_writel(mem_stcfg,MEM_STCFG2); } static void auide_set_dma_mode(ide_drive_t *drive, const u8 speed) static void auide_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) { int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2); switch(speed) { switch (drive->dma_mode) { #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA case XFER_MW_DMA_2: mem_sttime = SBC_IDE_TIMING(MDMA2); Loading Loading
drivers/ide/aec62xx.c +5 −5 Original line number Diff line number Diff line Loading @@ -81,15 +81,15 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entr return chipset_table->ultra_settings; } static void aec6210_set_mode(ide_drive_t *drive, const u8 speed) static void aec6210_set_mode(ide_hwif_t *hwif, ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; struct pci_dev *dev = to_pci_dev(hwif->dev); struct ide_host *host = pci_get_drvdata(dev); struct chipset_bus_clock_list_entry *bus_clock = host->host_priv; u16 d_conf = 0; u8 ultra = 0, ultra_conf = 0; u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; const u8 speed = drive->dma_mode; unsigned long flags; local_irq_save(flags); Loading @@ -109,15 +109,15 @@ static void aec6210_set_mode(ide_drive_t *drive, const u8 speed) local_irq_restore(flags); } static void aec6260_set_mode(ide_drive_t *drive, const u8 speed) static void aec6260_set_mode(ide_hwif_t *hwif, ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; struct pci_dev *dev = to_pci_dev(hwif->dev); struct ide_host *host = pci_get_drvdata(dev); struct chipset_bus_clock_list_entry *bus_clock = host->host_priv; u8 unit = drive->dn & 1; u8 tmp1 = 0, tmp2 = 0; u8 ultra = 0, drive_conf = 0, ultra_conf = 0; const u8 speed = drive->dma_mode; unsigned long flags; local_irq_save(flags); Loading @@ -137,7 +137,7 @@ static void aec6260_set_mode(ide_drive_t *drive, const u8 speed) static void aec_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) { drive->dma_mode = drive->pio_mode; hwif->port_ops->set_dma_mode(drive, drive->dma_mode); hwif->port_ops->set_dma_mode(hwif, drive); } static int init_chipset_aec62xx(struct pci_dev *dev) Loading
drivers/ide/alim15x3.c +3 −3 Original line number Diff line number Diff line Loading @@ -121,16 +121,16 @@ static u8 ali_udma_filter(ide_drive_t *drive) /** * ali_set_dma_mode - set host controller for DMA mode * @hwif: port * @drive: drive * @speed: DMA mode * * Configure the hardware for the desired IDE transfer mode. */ static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; struct pci_dev *dev = to_pci_dev(hwif->dev); const u8 speed = drive->dma_mode; u8 speed1 = speed; u8 unit = drive->dn & 1; u8 tmpbyte = 0x00; Loading
drivers/ide/amd74xx.c +4 −3 Original line number Diff line number Diff line Loading @@ -79,14 +79,14 @@ static void amd_set_speed(struct pci_dev *dev, u8 dn, u8 udma_mask, * to a desired transfer mode. It also can be called by upper layers. */ static void amd_set_drive(ide_drive_t *drive, const u8 speed) static void amd_set_drive(ide_hwif_t *hwif, ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; struct pci_dev *dev = to_pci_dev(hwif->dev); ide_drive_t *peer = ide_get_pair_dev(drive); struct ide_timing t, p; int T, UT; u8 udma_mask = hwif->ultra_mask; const u8 speed = drive->dma_mode; T = 1000000000 / amd_clock; UT = (udma_mask == ATA_UDMA2) ? T : (T / 2); Loading @@ -110,7 +110,8 @@ static void amd_set_drive(ide_drive_t *drive, const u8 speed) static void amd_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) { amd_set_drive(drive, drive->pio_mode); drive->dma_mode = drive->pio_mode; amd_set_drive(hwif, drive); } static void amd7409_cable_detect(struct pci_dev *dev) Loading
drivers/ide/atiixp.c +4 −3 Original line number Diff line number Diff line Loading @@ -75,21 +75,22 @@ static void atiixp_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) /** * atiixp_set_dma_mode - set host controller for DMA mode * @hwif: port * @drive: drive * @speed: DMA mode * * Set a ATIIXP host controller to the desired DMA mode. This involves * programming the right timing data into the PCI configuration space. */ static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed) static void atiixp_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) { struct pci_dev *dev = to_pci_dev(drive->hwif->dev); struct pci_dev *dev = to_pci_dev(hwif->dev); unsigned long flags; int timing_shift = (drive->dn ^ 1) * 8; u32 tmp32; u16 tmp16; u16 udma_ctl = 0; const u8 speed = drive->dma_mode; spin_lock_irqsave(&atiixp_lock, flags); Loading
drivers/ide/au1xxx-ide.c +2 −2 Original line number Diff line number Diff line Loading @@ -160,11 +160,11 @@ static void au1xxx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) au_writel(mem_stcfg,MEM_STCFG2); } static void auide_set_dma_mode(ide_drive_t *drive, const u8 speed) static void auide_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) { int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2); switch(speed) { switch (drive->dma_mode) { #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA case XFER_MW_DMA_2: mem_sttime = SBC_IDE_TIMING(MDMA2); Loading