Commit 88d7e284 authored by Chaitanya Kumar Borah's avatar Chaitanya Kumar Borah Committed by Animesh Manna
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drm/i915/color: Do not pre-load LUTs with DB registers 



Since Double Buffered LUT registers can be written in active region
no need to preload them.

Signed-off-by: default avatarChaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
Signed-off-by: default avatarAnimesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250523062041.166468-11-chaitanya.kumar.borah@intel.com
parent d94a92b7

drivers/gpu/drm/i915/display/intel_color.c

+4 −0
Original line number Diff line number Diff line
@@ -2041,9 +2041,13 @@ void intel_color_wait_commit(const struct intel_crtc_state *crtc_state) 
static bool intel_can_preload_luts(struct intel_atomic_state *state,

				   struct intel_crtc *crtc)

{

	struct intel_display *display = to_intel_display(state);

	const struct intel_crtc_state *old_crtc_state =

		intel_atomic_get_old_crtc_state(state, crtc);



	if (HAS_DOUBLE_BUFFERED_LUT(display))

		return false;



	return !old_crtc_state->post_csc_lut &&

		!old_crtc_state->pre_csc_lut;

}