Commit 8a9866ff authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Set ID_{AA64PFR0,PFR1}_EL1.GIC when GICv3 is configured 



Drive the idreg fields indicating the presence of GICv3 directly from
the vgic code. This avoids having to do any sort of runtime clearing
of the idreg.

Fixes: 5cb57a1a ("KVM: arm64: Zero ID_AA64PFR0_EL1.GIC when no GICv3 is presented to the guest")
Reviewed-by: default avatarOliver Upton <oupton@kernel.org>
Link: https://patch.msgid.link/20251030122707.2033690-3-maz@kernel.org


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 3f9eacf4

arch/arm64/kvm/vgic/vgic-init.c

+12 −2
Original line number Diff line number Diff line
@@ -71,6 +71,7 @@ static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type); 
int kvm_vgic_create(struct kvm *kvm, u32 type)

{

	struct kvm_vcpu *vcpu;

	u64 aa64pfr0, pfr1;

	unsigned long i;

	int ret;
@@ -161,10 +162,19 @@ int kvm_vgic_create(struct kvm *kvm, u32 type) 


	kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;



	if (type == KVM_DEV_TYPE_ARM_VGIC_V2)

	aa64pfr0 = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1) & ~ID_AA64PFR0_EL1_GIC;

	pfr1 = kvm_read_vm_id_reg(kvm, SYS_ID_PFR1_EL1) & ~ID_PFR1_EL1_GIC;



	if (type == KVM_DEV_TYPE_ARM_VGIC_V2) {

		kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;

	else

	} else {

		INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);

		aa64pfr0 |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, GIC, IMP);

		pfr1 |= SYS_FIELD_PREP_ENUM(ID_PFR1_EL1, GIC, GICv3);

	}



	kvm_set_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1, aa64pfr0);

	kvm_set_vm_id_reg(kvm, SYS_ID_PFR1_EL1, pfr1);



	if (type == KVM_DEV_TYPE_ARM_VGIC_V3)

		kvm->arch.vgic.nassgicap = system_supports_direct_sgis();