Commit 8ab1b51f authored by Shen Lichuan's avatar Shen Lichuan Committed by Miquel Raynal
Browse files

mtd: rawnand: Correct multiple typos in comments 



Fixed some confusing spelling errors, the details are as follows:

-in the code comments:
	remaing		-> remaining
	alingment	-> alignment
	capabilitiies	-> capabilities
	operatoin	-> operation
	decriptors	-> descriptors
	stareted	-> started
	Unfortunelly	-> Unfortunately
	compatabable	-> compatible
	depenent	-> dependent

Signed-off-by: default avatarShen Lichuan <shenlichuan@vivo.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240923065649.11966-1-shenlichuan@vivo.com
parent 9852d85e

drivers/mtd/nand/raw/brcmnand/brcmnand.c

+1 −1
Original line number Diff line number Diff line
@@ -1561,7 +1561,7 @@ static int write_oob_to_regs(struct brcmnand_controller *ctrl, int i, 
				(oob[j + 2] <<  8) |

				(oob[j + 3] <<  0));



	/* handle the remaing bytes */

	/* handle the remaining bytes */

	while (j < tbytes)

		plast[k++] = oob[j++];

drivers/mtd/nand/raw/cadence-nand-controller.c

+1 −1
Original line number Diff line number Diff line
@@ -1891,7 +1891,7 @@ static int cadence_nand_read_buf(struct cdns_nand_ctrl *cdns_ctrl, 


		int len_in_words = (data_dma_width == 4) ? len >> 2 : len >> 3;



		/* read alingment data */

		/* read alignment data */

		if (data_dma_width == 4)

			ioread32_rep(cdns_ctrl->io.virt, buf, len_in_words);

#ifdef CONFIG_64BIT

drivers/mtd/nand/raw/cs553x_nand.c

+1 −1
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 


#define NR_CS553X_CONTROLLERS	4



#define MSR_DIVIL_GLD_CAP	0x51400000	/* DIVIL capabilitiies */

#define MSR_DIVIL_GLD_CAP	0x51400000	/* DIVIL capabilities */

#define CAP_CS5535		0x2df000ULL

#define CAP_CS5536		0x5df500ULL

drivers/mtd/nand/raw/nand_macronix.c

+1 −1
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ static void macronix_nand_onfi_init(struct nand_chip *chip) 
	rand_otp = of_property_read_bool(dn, "mxic,enable-randomizer-otp");



	mxic = (struct nand_onfi_vendor_macronix *)p->onfi->vendor;

	/* Subpage write is prohibited in randomizer operatoin */

	/* Subpage write is prohibited in randomizer operation */

	if (rand_otp && chip->options & NAND_NO_SUBPAGE_WRITE &&

	    mxic->reliability_func & MACRONIX_RANDOMIZER_BIT) {

		if (p->supports_set_get_features) {

drivers/mtd/nand/raw/pl35x-nand-controller.c

+1 −1
Original line number Diff line number Diff line
@@ -187,7 +187,7 @@ static const struct mtd_ooblayout_ops pl35x_ecc_ooblayout16_ops = { 
	.free = pl35x_ecc_ooblayout16_free,

};



/* Generic flash bbt decriptors */

/* Generic flash bbt descriptors */

static u8 bbt_pattern[] = { 'B', 'b', 't', '0' };

static u8 mirror_pattern[] = { '1', 't', 'b', 'B' };