Commit 8b6c828b authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/psr: Ignore enable_psr parameter on Panel Replay 



Currently we are disabling Panel Replay if enable_psr != -1. Lets ignore
enable_psr completely on Panel Replay.

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20250715105509.4146806-3-jouni.hogander@intel.com
parent d12a58c2

drivers/gpu/drm/i915/display/intel_psr.c

+7 −20
Original line number Diff line number Diff line
@@ -233,16 +233,12 @@ bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder, 


static bool psr_global_enabled(struct intel_dp *intel_dp)

{

	struct intel_display *display = to_intel_display(intel_dp);

	struct intel_connector *connector = intel_dp->attached_connector;



	switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {

	case I915_PSR_DEBUG_DEFAULT:

		if (display->params.enable_psr == -1)

		return intel_dp_is_edp(intel_dp) ?

				connector->panel.vbt.psr.enable :

				true;

		return display->params.enable_psr;

			connector->panel.vbt.psr.enable : true;

	case I915_PSR_DEBUG_DISABLE:

		return false;

	default:
@@ -250,29 +246,20 @@ static bool psr_global_enabled(struct intel_dp *intel_dp) 
	}

}



static bool psr2_global_enabled(struct intel_dp *intel_dp)

static bool sel_update_global_enabled(struct intel_dp *intel_dp)

{

	struct intel_display *display = to_intel_display(intel_dp);



	switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {

	case I915_PSR_DEBUG_DISABLE:

	case I915_PSR_DEBUG_FORCE_PSR1:

		return false;

	default:

		if (display->params.enable_psr == 1)

			return false;

		return true;

	}

}



static bool panel_replay_global_enabled(struct intel_dp *intel_dp)

{

	struct intel_display *display = to_intel_display(intel_dp);



	if ((display->params.enable_psr != -1) ||

	    (intel_dp->psr.debug & I915_PSR_DEBUG_PANEL_REPLAY_DISABLE))

		return false;

	return true;

	return !(intel_dp->psr.debug & I915_PSR_DEBUG_PANEL_REPLAY_DISABLE);

}



static u32 psr_irq_psr_error_bit_get(struct intel_dp *intel_dp)
@@ -1412,7 +1399,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, 
	int crtc_vdisplay = crtc_state->hw.adjusted_mode.crtc_vdisplay;

	int psr_max_h = 0, psr_max_v = 0, max_bpp = 0;



	if (!intel_dp->psr.sink_psr2_support)

	if (!intel_dp->psr.sink_psr2_support || display->params.enable_psr == 1)

		return false;



	/* JSL and EHL only supports eDP 1.3 */
@@ -1517,7 +1504,7 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp, 
		goto unsupported;

	}



	if (!psr2_global_enabled(intel_dp)) {

	if (!sel_update_global_enabled(intel_dp)) {

		drm_dbg_kms(display->drm,

			    "Selective update disabled by flag\n");

		goto unsupported;
@@ -1565,7 +1552,7 @@ static bool _psr_compute_config(struct intel_dp *intel_dp, 
	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;

	int entry_setup_frames;



	if (!CAN_PSR(intel_dp))

	if (!CAN_PSR(intel_dp) || !display->params.enable_psr)

		return false;



	/*