Commit 8bba55f7 authored by Joel Stanley's avatar Joel Stanley
Browse files

ARM: dts: aspeed-g6: Fix i2c clock source



The upstream clock for the I2C buses is APB2.

Reviewed-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent 37ece7e3
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+17 −17
Original line number Diff line number Diff line
@@ -527,13 +527,13 @@ i2c: bus@1e78a000 {
#include "aspeed-g6-pinctrl.dtsi"

&i2c {
	i2c0: i2c-bus@40 {
	i2c0: i2c-bus@80 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;
		reg = <0x80 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -548,7 +548,7 @@ i2c1: i2c-bus@100 {
		#interrupt-cells = <1>;
		reg = <0x100 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -563,7 +563,7 @@ i2c2: i2c-bus@180 {
		#interrupt-cells = <1>;
		reg = <0x180 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -578,7 +578,7 @@ i2c3: i2c-bus@200 {
		#interrupt-cells = <1>;
		reg = <0x200 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -593,7 +593,7 @@ i2c4: i2c-bus@280 {
		#interrupt-cells = <1>;
		reg = <0x280 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -608,7 +608,7 @@ i2c5: i2c-bus@300 {
		#interrupt-cells = <1>;
		reg = <0x300 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -623,7 +623,7 @@ i2c6: i2c-bus@380 {
		#interrupt-cells = <1>;
		reg = <0x380 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -638,7 +638,7 @@ i2c7: i2c-bus@400 {
		#interrupt-cells = <1>;
		reg = <0x400 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -653,7 +653,7 @@ i2c8: i2c-bus@480 {
		#interrupt-cells = <1>;
		reg = <0x480 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -668,7 +668,7 @@ i2c9: i2c-bus@500 {
		#interrupt-cells = <1>;
		reg = <0x500 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -683,7 +683,7 @@ i2c10: i2c-bus@580 {
		#interrupt-cells = <1>;
		reg = <0x580 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -698,7 +698,7 @@ i2c11: i2c-bus@600 {
		#interrupt-cells = <1>;
		reg = <0x600 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -713,7 +713,7 @@ i2c12: i2c-bus@680 {
		#interrupt-cells = <1>;
		reg = <0x680 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -728,7 +728,7 @@ i2c13: i2c-bus@700 {
		#interrupt-cells = <1>;
		reg = <0x700 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -743,7 +743,7 @@ i2c14: i2c-bus@780 {
		#interrupt-cells = <1>;
		reg = <0x780 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;
@@ -758,7 +758,7 @@ i2c15: i2c-bus@800 {
		#interrupt-cells = <1>;
		reg = <0x800 0x80>;
		compatible = "aspeed,ast2600-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB1>;
		clocks = <&syscon ASPEED_CLK_APB2>;
		resets = <&syscon ASPEED_RESET_I2C>;
		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
		bus-frequency = <100000>;