Commit 8e742c6e authored by Harry Austen's avatar Harry Austen Committed by Stephen Boyd
Browse files

clk: clocking-wizard: move dynamic reconfig setup behind flag 



Xilinx clocking wizard IP core's dynamic reconfiguration support is
optionally enabled at build time. Use the new boolean devicetree
property to indicate whether the hardware supports this feature or not.

Signed-off-by: default avatarHarry Austen <hpausten@protonmail.com>
Link: https://lore.kernel.org/r/20240913191037.2690-7-hpausten@protonmail.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 698a3e3c

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

+38 −35
Original line number Diff line number Diff line
@@ -1146,6 +1146,17 @@ static int clk_wzrd_probe(struct platform_device *pdev) 
	if (IS_ERR(clk_wzrd->base))

		return PTR_ERR(clk_wzrd->base);



	clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk");

	if (IS_ERR(clk_wzrd->axi_clk))

		return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk),

				     "s_axi_aclk not found\n");

	rate = clk_get_rate(clk_wzrd->axi_clk);

	if (rate > WZRD_ACLK_MAX_FREQ) {

		dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n", rate);

		return -EINVAL;

	}



	if (!of_property_present(np, "xlnx,static-config")) {

		ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade);

		if (!ret) {

			if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) {
@@ -1160,22 +1171,13 @@ static int clk_wzrd_probe(struct platform_device *pdev) 
			return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1),

					     "clk_in1 not found\n");



	clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk");

	if (IS_ERR(clk_wzrd->axi_clk))

		return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk),

				     "s_axi_aclk not found\n");

	rate = clk_get_rate(clk_wzrd->axi_clk);

	if (rate > WZRD_ACLK_MAX_FREQ) {

		dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n", rate);

		return -EINVAL;

	}



		ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs);

		if (ret)

			return ret;



		clk_wzrd->clk_data.num = nr_outputs;

	ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, &clk_wzrd->clk_data);

		ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get,

						  &clk_wzrd->clk_data);

		if (ret) {

			dev_err(&pdev->dev, "unable to register clock provider\n");

			return ret;
@@ -1196,6 +1198,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) 
				dev_warn(&pdev->dev,

					 "unable to register clock notifier\n");

		}

	}



	return 0;

}