Commit 8ed322f6 authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm/adreno: Split up giant device table 



Split into a separate table per generation, in preparation to move each
gen's device table to it's own file.

Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/599723/
parent 92815da4

drivers/gpu/drm/msm/adreno/adreno_device.c

+53 −14
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ bool allow_vram_carveout = false; 
MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU");

module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600);



static const struct adreno_info gpulist[] = {

static const struct adreno_info a2xx_gpus[] = {

	{

		.chip_ids = ADRENO_CHIP_IDS(0x02000000),

		.family = ADRENO_2XX_GEN1,
@@ -54,7 +54,12 @@ static const struct adreno_info gpulist[] = { 
		.gmem  = SZ_512K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a2xx_gpu_init,

	}, {

	}

};

DECLARE_ADRENO_GPULIST(a2xx);



static const struct adreno_info a3xx_gpus[] = {

	{

		.chip_ids = ADRENO_CHIP_IDS(0x03000512),

		.family = ADRENO_3XX,

		.fw = {
@@ -116,7 +121,12 @@ static const struct adreno_info gpulist[] = { 
		.gmem  = SZ_1M,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a3xx_gpu_init,

	}, {

	}

};

DECLARE_ADRENO_GPULIST(a3xx);



static const struct adreno_info a4xx_gpus[] = {

	{

		.chip_ids = ADRENO_CHIP_IDS(0x04000500),

		.family = ADRENO_4XX,

		.revn  = 405,
@@ -149,7 +159,12 @@ static const struct adreno_info gpulist[] = { 
		.gmem  = (SZ_1M + SZ_512K),

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a4xx_gpu_init,

	}, {

	}

};

DECLARE_ADRENO_GPULIST(a4xx);



static const struct adreno_info a5xx_gpus[] = {

	{

		.chip_ids = ADRENO_CHIP_IDS(0x05000600),

		.family = ADRENO_5XX,

		.revn = 506,
@@ -274,7 +289,12 @@ static const struct adreno_info gpulist[] = { 
		.quirks = ADRENO_QUIRK_LMLOADKILL_DISABLE,

		.init = a5xx_gpu_init,

		.zapfw = "a540_zap.mdt",

	}, {

	}

};

DECLARE_ADRENO_GPULIST(a5xx);



static const struct adreno_info a6xx_gpus[] = {

	{

		.chip_ids = ADRENO_CHIP_IDS(0x06010000),

		.family = ADRENO_6XX_GEN1,

		.revn = 610,
@@ -520,7 +540,12 @@ static const struct adreno_info gpulist[] = { 
		.zapfw = "a690_zap.mdt",

		.hwcg = a690_hwcg,

		.address_space_size = SZ_16G,

	}, {

	}

};

DECLARE_ADRENO_GPULIST(a6xx);



static const struct adreno_info a7xx_gpus[] = {

	{

		.chip_ids = ADRENO_CHIP_IDS(0x07000200),

		.family = ADRENO_6XX_GEN1, /* NOT a mistake! */

		.fw = {
@@ -582,7 +607,17 @@ static const struct adreno_info gpulist[] = { 
		.init = a6xx_gpu_init,

		.zapfw = "gen70900_zap.mbn",

		.address_space_size = SZ_16G,

	},

	}

};

DECLARE_ADRENO_GPULIST(a7xx);



static const struct adreno_gpulist *gpulists[] = {

	&a2xx_gpulist,

	&a3xx_gpulist,

	&a4xx_gpulist,

	&a5xx_gpulist,

	&a6xx_gpulist,

	&a6xx_gpulist,

};



MODULE_FIRMWARE("qcom/a300_pm4.fw");
@@ -617,14 +652,18 @@ MODULE_FIRMWARE("qcom/yamato_pm4.fw"); 
static const struct adreno_info *adreno_info(uint32_t chip_id)

{

	/* identify gpu: */

	for (int i = 0; i < ARRAY_SIZE(gpulist); i++) {

		const struct adreno_info *info = &gpulist[i];

	for (int i = 0; i < ARRAY_SIZE(gpulists); i++) {

		for (int j = 0; j < gpulists[i]->gpus_count; j++) {

			const struct adreno_info *info = &gpulists[i]->gpus[j];



			if (info->machine && !of_machine_is_compatible(info->machine))

				continue;

		for (int j = 0; info->chip_ids[j]; j++)

			if (info->chip_ids[j] == chip_id)



			for (int k = 0; info->chip_ids[k]; k++)

				if (info->chip_ids[k] == chip_id)

					return info;

		}

	}



	return NULL;

}

drivers/gpu/drm/msm/adreno/adreno_gpu.h

+10 −0
Original line number Diff line number Diff line
@@ -114,6 +114,16 @@ struct adreno_info { 


#define ADRENO_CHIP_IDS(tbl...) (uint32_t[]) { tbl, 0 }



struct adreno_gpulist {

	const struct adreno_info *gpus;

	unsigned gpus_count;

};



#define DECLARE_ADRENO_GPULIST(name)                  \

const struct adreno_gpulist name ## _gpulist = {      \

	name ## _gpus, ARRAY_SIZE(name ## _gpus)      \

}



/*

 * Helper to build a speedbin table, ie. the table:

 *      fuse | speedbin