Commit 8ee6c616 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/controller/dra7xx' 

- Simplify by using syscon_regmap_lookup_by_phandle_args() instead of
  syscon_regmap_lookup_by_phandle() followed by
  of_parse_phandle_with_fixed_args() or of_property_read_u32_index()
  (Krzysztof Kozlowski)

* pci/controller/dra7xx:
  PCI: dra7xx: Use syscon_regmap_lookup_by_phandle_args
parents ec3619ab ad9afd75

drivers/pci/controller/dwc/pci-dra7xx.c

+6 −21
Original line number Diff line number Diff line
@@ -635,30 +635,20 @@ static int dra7xx_pcie_unaligned_memaccess(struct device *dev) 
{

	int ret;

	struct device_node *np = dev->of_node;

	struct of_phandle_args args;

	unsigned int args[2];

	struct regmap *regmap;



	regmap = syscon_regmap_lookup_by_phandle(np,

						 "ti,syscon-unaligned-access");

	regmap = syscon_regmap_lookup_by_phandle_args(np, "ti,syscon-unaligned-access",

						      2, args);

	if (IS_ERR(regmap)) {

		dev_dbg(dev, "can't get ti,syscon-unaligned-access\n");

		return -EINVAL;

	}



	ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-unaligned-access",

					       2, 0, &args);

	if (ret) {

		dev_err(dev, "failed to parse ti,syscon-unaligned-access\n");

		return ret;

	}



	ret = regmap_update_bits(regmap, args.args[0], args.args[1],

				 args.args[1]);

	ret = regmap_update_bits(regmap, args[0], args[1], args[1]);

	if (ret)

		dev_err(dev, "failed to enable unaligned access\n");



	of_node_put(args.np);



	return ret;

}
@@ -671,18 +661,13 @@ static int dra7xx_pcie_configure_two_lane(struct device *dev, 
	u32 mask;

	u32 val;



	pcie_syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-lane-sel");

	pcie_syscon = syscon_regmap_lookup_by_phandle_args(np, "ti,syscon-lane-sel",

							   1, &pcie_reg);

	if (IS_ERR(pcie_syscon)) {

		dev_err(dev, "unable to get ti,syscon-lane-sel\n");

		return -EINVAL;

	}



	if (of_property_read_u32_index(np, "ti,syscon-lane-sel", 1,

				       &pcie_reg)) {

		dev_err(dev, "couldn't get lane selection reg offset\n");

		return -EINVAL;

	}



	mask = b1co_mode_sel_mask | PCIE_B0_B1_TSYNCEN;

	val = PCIE_B1C0_MODE_SEL | PCIE_B0_B1_TSYNCEN;

	regmap_update_bits(pcie_syscon, pcie_reg, mask, val);