Commit 8f5a7561 authored by Roger Quadros's avatar Roger Quadros Committed by David S. Miller
Browse files

net: ethernet: am65-cpsw: Move register definitions to header file 



Move register definitions to header file. No functional change.

Signed-off-by: default avatarRoger Quadros <rogerq@kernel.org>
Reviewed-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1374841a

drivers/net/ethernet/ti/am65-cpsw-qos.c

+0 −35
Original line number Diff line number Diff line
@@ -15,41 +15,6 @@ 
#include "am65-cpts.h"

#include "cpsw_ale.h"



#define AM65_CPSW_REG_CTL			0x004

#define AM65_CPSW_PN_REG_CTL			0x004

#define AM65_CPSW_PN_REG_FIFO_STATUS		0x050

#define AM65_CPSW_PN_REG_EST_CTL		0x060

#define AM65_CPSW_PN_REG_PRI_CIR(pri)		(0x140 + 4 * (pri))



/* AM65_CPSW_REG_CTL register fields */

#define AM65_CPSW_CTL_EST_EN			BIT(18)



/* AM65_CPSW_PN_REG_CTL register fields */

#define AM65_CPSW_PN_CTL_EST_PORT_EN		BIT(17)



/* AM65_CPSW_PN_REG_EST_CTL register fields */

#define AM65_CPSW_PN_EST_ONEBUF			BIT(0)

#define AM65_CPSW_PN_EST_BUFSEL			BIT(1)

#define AM65_CPSW_PN_EST_TS_EN			BIT(2)

#define AM65_CPSW_PN_EST_TS_FIRST		BIT(3)

#define AM65_CPSW_PN_EST_ONEPRI			BIT(4)

#define AM65_CPSW_PN_EST_TS_PRI_MSK		GENMASK(7, 5)



/* AM65_CPSW_PN_REG_FIFO_STATUS register fields */

#define AM65_CPSW_PN_FST_TX_PRI_ACTIVE_MSK	GENMASK(7, 0)

#define AM65_CPSW_PN_FST_TX_E_MAC_ALLOW_MSK	GENMASK(15, 8)

#define AM65_CPSW_PN_FST_EST_CNT_ERR		BIT(16)

#define AM65_CPSW_PN_FST_EST_ADD_ERR		BIT(17)

#define AM65_CPSW_PN_FST_EST_BUFACT		BIT(18)



/* EST FETCH COMMAND RAM */

#define AM65_CPSW_FETCH_RAM_CMD_NUM		0x80

#define AM65_CPSW_FETCH_CNT_MSK			GENMASK(21, 8)

#define AM65_CPSW_FETCH_CNT_MAX			(AM65_CPSW_FETCH_CNT_MSK >> 8)

#define AM65_CPSW_FETCH_CNT_OFFSET		8

#define AM65_CPSW_FETCH_ALLOW_MSK		GENMASK(7, 0)

#define AM65_CPSW_FETCH_ALLOW_MAX		AM65_CPSW_FETCH_ALLOW_MSK



enum timer_act {

	TACT_PROG,		/* need program timer */

	TACT_NEED_STOP,		/* need stop first */

drivers/net/ethernet/ti/am65-cpsw-qos.h

+35 −0
Original line number Diff line number Diff line
@@ -31,6 +31,41 @@ struct am65_cpsw_qos { 
	struct am65_cpsw_ale_ratelimit ale_mc_ratelimit;

};



#define AM65_CPSW_REG_CTL			0x004

#define AM65_CPSW_PN_REG_CTL			0x004

#define AM65_CPSW_PN_REG_FIFO_STATUS		0x050

#define AM65_CPSW_PN_REG_EST_CTL		0x060

#define AM65_CPSW_PN_REG_PRI_CIR(pri)		(0x140 + 4 * (pri))



/* AM65_CPSW_REG_CTL register fields */

#define AM65_CPSW_CTL_EST_EN			BIT(18)



/* AM65_CPSW_PN_REG_CTL register fields */

#define AM65_CPSW_PN_CTL_EST_PORT_EN		BIT(17)



/* AM65_CPSW_PN_REG_EST_CTL register fields */

#define AM65_CPSW_PN_EST_ONEBUF			BIT(0)

#define AM65_CPSW_PN_EST_BUFSEL			BIT(1)

#define AM65_CPSW_PN_EST_TS_EN			BIT(2)

#define AM65_CPSW_PN_EST_TS_FIRST		BIT(3)

#define AM65_CPSW_PN_EST_ONEPRI			BIT(4)

#define AM65_CPSW_PN_EST_TS_PRI_MSK		GENMASK(7, 5)



/* AM65_CPSW_PN_REG_FIFO_STATUS register fields */

#define AM65_CPSW_PN_FST_TX_PRI_ACTIVE_MSK	GENMASK(7, 0)

#define AM65_CPSW_PN_FST_TX_E_MAC_ALLOW_MSK	GENMASK(15, 8)

#define AM65_CPSW_PN_FST_EST_CNT_ERR		BIT(16)

#define AM65_CPSW_PN_FST_EST_ADD_ERR		BIT(17)

#define AM65_CPSW_PN_FST_EST_BUFACT		BIT(18)



/* EST FETCH COMMAND RAM */

#define AM65_CPSW_FETCH_RAM_CMD_NUM		0x80

#define AM65_CPSW_FETCH_CNT_MSK			GENMASK(21, 8)

#define AM65_CPSW_FETCH_CNT_MAX			(AM65_CPSW_FETCH_CNT_MSK >> 8)

#define AM65_CPSW_FETCH_CNT_OFFSET		8

#define AM65_CPSW_FETCH_ALLOW_MSK		GENMASK(7, 0)

#define AM65_CPSW_FETCH_ALLOW_MAX		AM65_CPSW_FETCH_ALLOW_MSK



#if IS_ENABLED(CONFIG_TI_AM65_CPSW_QOS)

int am65_cpsw_qos_ndo_setup_tc(struct net_device *ndev, enum tc_setup_type type,

			       void *type_data);