Commit 90a2bee8 authored by Niklas Söderlund's avatar Niklas Söderlund Committed by Geert Uytterhoeven
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clk: renesas: r8a779h0: Add VSPX clock 



Add the VSPX modules clock for Renesas R-Car V4M.

Signed-off-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115175927.3714357-3-niklas.soderlund+renesas@ragnatech.se


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent aeb06d51

drivers/clk/renesas/r8a779h0-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -239,6 +239,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { 
	DEF_MOD("pfc1",		916,	R8A779H0_CLK_CP),

	DEF_MOD("pfc2",		917,	R8A779H0_CLK_CP),

	DEF_MOD("tsc2:tsc1",	919,	R8A779H0_CLK_CL16M),

	DEF_MOD("vspx0",	1028,	R8A779H0_CLK_S0D1_VIO),

	DEF_MOD("fcpvx0",	1100,	R8A779H0_CLK_S0D1_VIO),

	DEF_MOD("ssiu",		2926,	R8A779H0_CLK_S0D6_PER),

	DEF_MOD("ssi",		2927,	R8A779H0_CLK_S0D6_PER),