Commit 91888b5b authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/dp: Add support for DP tunnel BW allocation 



Add support to enable the DP tunnel BW allocation mode. Follow-up
patches will call the required helpers added here to prepare for a
modeset on a link with DP tunnels, the last change in the patchset
actually enabling BWA.

With BWA enabled, the driver will expose the full mode list a display
supports, regardless of any BW limitation on a shared (Thunderbolt)
link. Such BW limits will be checked against only during a modeset, when
the driver has the full knowledge of each display's BW requirement.

If the link BW changes in a way that a connector's modelist may also
change, userspace will get a hotplug notification for all the connectors
sharing the same link (so it can adjust the mode used for a display).

The BW limitation can change at any point, asynchronously to modesets
on a given connector, so a modeset can fail even though the atomic check
for it passed. In such scenarios userspace will get a bad link
notification and in response is supposed to retry the modeset.

v2:
- Fix old vs. new connector state in intel_dp_tunnel_atomic_check_state().
  (Ville)
- Fix propagating the error from
  intel_dp_tunnel_atomic_compute_stream_bw(). (Ville)
- Move tunnel==NULL checks from driver to DRM core helpers. (Ville)
- Simplify return flow from intel_dp_tunnel_detect(). (Ville)
- s/dp_tunnel_state/inherited_dp_tunnels (Ville)
- Simplify struct intel_dp_tunnel_inherited_state. (Ville)
- Unconstify object pointers (vs. states) where possible. (Ville)
- Init crtc_state while declaring it in check_group_state(). (Ville)
- Join obj->base.id, obj->name arg lines in debug prints to reduce LOC.
  (Ville)
- Add/rework intel_dp_tunnel_atomic_alloc_bw() to prepare for moving the
  BW allocation from encoder hooks up to intel_atomic_commit_tail()
  later in the patchset.
- Disable BW alloc mode during system suspend.
- Allocate the required BW for all tunnels during system resume.
- Add intel_dp_tunnel_atomic_clear_stream_bw() instead of the open-coded
  sequence in a follow-up patch.
- Add function documentation to all exported functions.
- Add CONFIG_USB4 dependency to CONFIG_DRM_I915_DP_TUNNEL.

v3:
- Rebase on intel_dp_get_active_pipes() change in previous patch.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240226185246.1276018-4-imre.deak@intel.com
parent 199c7d75

drivers/gpu/drm/i915/Kconfig

+14 −0
Original line number Diff line number Diff line
@@ -155,6 +155,20 @@ config DRM_I915_PXP 
	  protected session and manage the status of the alive software session,

	  as well as its life cycle.



config DRM_I915_DP_TUNNEL

	bool "Enable DP tunnel support"

	depends on DRM_I915

	depends on USB4

	select DRM_DISPLAY_DP_TUNNEL

	default y

	help

	  Choose this option to detect DP tunnels and enable the Bandwidth

	  Allocation mode for such tunnels. This allows using the maximum

	  resolution allowed by the link BW on all displays sharing the

	  link BW, for instance on a Thunderbolt link.



	  If in doubt, say "Y".



menu "drm/i915 Debugging"

depends on DRM_I915

depends on EXPERT

drivers/gpu/drm/i915/Kconfig.debug

+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ config DRM_I915_DEBUG 
	select STACKDEPOT

	select STACKTRACE

	select DRM_DP_AUX_CHARDEV

	select DRM_DISPLAY_DEBUG_DP_TUNNEL_STATE if DRM_I915_DP_TUNNEL

	select X86_MSR # used by igt/pm_rpm

	select DRM_VGEM # used by igt/prime_vgem (dmabuf interop checks)

	select DRM_DEBUG_MM if DRM=y

drivers/gpu/drm/i915/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -369,6 +369,9 @@ i915-y += \ 
	display/vlv_dsi.o \

	display/vlv_dsi_pll.o



i915-$(CONFIG_DRM_I915_DP_TUNNEL) += \

	display/intel_dp_tunnel.o



i915-y += \

	i915_perf.o

drivers/gpu/drm/i915/display/intel_atomic.c

+2 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
 * See intel_atomic_plane.c for the plane-specific atomic functionality.

 */



#include <drm/display/drm_dp_tunnel.h>

#include <drm/drm_atomic.h>

#include <drm/drm_atomic_helper.h>

#include <drm/drm_fourcc.h>
@@ -38,6 +39,7 @@ 
#include "intel_atomic.h"

#include "intel_cdclk.h"

#include "intel_display_types.h"

#include "intel_dp_tunnel.h"

#include "intel_global_state.h"

#include "intel_hdcp.h"

#include "intel_psr.h"

drivers/gpu/drm/i915/display/intel_display_core.h

+1 −0
Original line number Diff line number Diff line
@@ -524,6 +524,7 @@ struct intel_display { 
	} wq;



	/* Grouping using named structs. Keep sorted. */

	struct drm_dp_tunnel_mgr *dp_tunnel_mgr;

	struct intel_audio audio;

	struct intel_dpll dpll;

	struct intel_fbc *fbc[I915_MAX_FBCS];