Commit 932ddde1 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

ARM: dts: Configure interconnect target module for omap4 debugss 



We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 0600dabe

arch/arm/boot/dts/omap4.dtsi

+21 −11
Original line number Diff line number Diff line
@@ -58,17 +58,6 @@ cpu@1 { 
		};

	};



	/*

	 * Note that 4430 needs cross trigger interface (CTI) supported

	 * before we can configure the interrupts. This means sampling

	 * events are not supported for pmu. Note that 4460 does not use

	 * CTI, see also 4460.dtsi.

	 */

	pmu {

		compatible = "arm,cortex-a9-pmu";

		ti,hwmods = "debugss";

	};



	gic: interrupt-controller@48241000 {

		compatible = "arm,cortex-a9-gic";

		interrupt-controller;
@@ -213,6 +202,27 @@ target-module@52000000 { 
			/* No child device binding, driver in staging */

		};



		/*

		 * Note that 4430 needs cross trigger interface (CTI) supported

		 * before we can configure the interrupts. This means sampling

		 * events are not supported for pmu. Note that 4460 does not use

		 * CTI, see also 4460.dtsi.

		 */

		target-module@54000000 {

			compatible = "ti,sysc-omap4-simple", "ti,sysc";

			ti,hwmods = "debugss";

			power-domains = <&prm_emu>;

			clocks = <&emu_sys_clkctrl OMAP4_DEBUGSS_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x54000000 0x1000000>;



			pmu: pmu {

				compatible = "arm,cortex-a9-pmu";

			};

		};



		target-module@55082000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			reg = <0x55082000 0x4>,

arch/arm/boot/dts/omap4460.dtsi

+6 −7
Original line number Diff line number Diff line
@@ -26,13 +26,6 @@ cpu0: cpu@0 { 
		};

	};



	pmu {

		compatible = "arm,cortex-a9-pmu";

		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

		ti,hwmods = "debugss";

	};



	thermal-zones {

		#include "omap4-cpu-thermal.dtsi"

	};
@@ -128,4 +121,10 @@ &l4_cfg_target_0 { 
		 <0x00030000 0x00030000 0x00010000>;

};



&pmu {

	compatible = "arm,cortex-a9-pmu";

	interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

};



/include/ "omap446x-clocks.dtsi"