Commit 935b8211 authored by Xi Pardee's avatar Xi Pardee Committed by Hans de Goede
Browse files

platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-P 



Add support to read the low power mode requirements for Meteor Lake M and
Meteor Lake P.

Signed-off-by: default avatarXi Pardee <xi.pardee@intel.com>
Signed-off-by: default avatarDavid E. Box <david.e.box@linux.intel.com>
Reviewed-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231129222132.2331261-19-david.e.box@linux.intel.com


Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
parent 4d621c3f

drivers/platform/x86/intel/pmc/mtl.c

+32 −7
Original line number Diff line number Diff line
@@ -11,6 +11,13 @@ 
#include <linux/pci.h>

#include "core.h"



/* PMC SSRAM PMT Telemetry GUIDS */

#define SOCP_LPM_REQ_GUID	0x2625030

#define IOEM_LPM_REQ_GUID	0x4357464

#define IOEP_LPM_REQ_GUID	0x5077612



static const u8 MTL_LPM_REG_INDEX[] = {0, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, 20};



/*

 * Die Mapping to Product.

 * Product SOCDie IOEDie PCHDie
@@ -465,6 +472,7 @@ const struct pmc_reg_map mtl_socm_reg_map = { 
	.lpm_sts = mtl_socm_lpm_maps,

	.lpm_status_offset = MTL_LPM_STATUS_OFFSET,

	.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,

	.lpm_reg_index = MTL_LPM_REG_INDEX,

};



const struct pmc_bit_map mtl_ioep_pfear_map[] = {
@@ -782,6 +790,13 @@ const struct pmc_reg_map mtl_ioep_reg_map = { 
	.ltr_show_sts = mtl_ioep_ltr_show_map,

	.ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET,

	.ltr_ignore_max = ADL_NUM_IP_IGN_ALLOWED,

	.lpm_num_maps = ADL_LPM_NUM_MAPS,

	.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,

	.lpm_residency_offset = MTL_LPM_RESIDENCY_OFFSET,

	.lpm_priority_offset = MTL_LPM_PRI_OFFSET,

	.lpm_en_offset = MTL_LPM_EN_OFFSET,

	.lpm_sts_latch_en_offset = MTL_LPM_STATUS_LATCH_EN_OFFSET,

	.lpm_reg_index = MTL_LPM_REG_INDEX,

};



const struct pmc_bit_map mtl_ioem_pfear_map[] = {
@@ -922,6 +937,13 @@ const struct pmc_reg_map mtl_ioem_reg_map = { 
	.ltr_show_sts = mtl_ioep_ltr_show_map,

	.ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET,

	.ltr_ignore_max = ADL_NUM_IP_IGN_ALLOWED,

	.lpm_sts_latch_en_offset = MTL_LPM_STATUS_LATCH_EN_OFFSET,

	.lpm_num_maps = ADL_LPM_NUM_MAPS,

	.lpm_priority_offset = MTL_LPM_PRI_OFFSET,

	.lpm_en_offset = MTL_LPM_EN_OFFSET,

	.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,

	.lpm_residency_offset = MTL_LPM_RESIDENCY_OFFSET,

	.lpm_reg_index = MTL_LPM_REG_INDEX,

};



#define PMC_DEVID_SOCM	0x7e7f
@@ -929,14 +951,17 @@ const struct pmc_reg_map mtl_ioem_reg_map = { 
#define PMC_DEVID_IOEM	0x7ebf

static struct pmc_info mtl_pmc_info_list[] = {

	{

		.guid	= SOCP_LPM_REQ_GUID,

		.devid	= PMC_DEVID_SOCM,

		.map	= &mtl_socm_reg_map,

	},

	{

		.guid	= IOEP_LPM_REQ_GUID,

		.devid	= PMC_DEVID_IOEP,

		.map	= &mtl_ioep_reg_map,

	},

	{

		.guid	= IOEM_LPM_REQ_GUID,

		.devid	= PMC_DEVID_IOEM,

		.map	= &mtl_ioem_reg_map

	},
@@ -1014,5 +1039,5 @@ int mtl_core_init(struct pmc_dev *pmcdev) 
	dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");

	pmc_core_send_ltr_ignore(pmcdev, 3);



	return 0;

	return pmc_core_ssram_get_lpm_reqs(pmcdev);

}