Unverified Commit 94e4dd09 authored by William-tw Lin's avatar William-tw Lin Committed by AngeloGioacchino Del Regno
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arm64: dts: mediatek: Add socinfo efuses to MT8173/83/96/92/95 SoCs 



Add efuse nodes for socinfo retrieval for MT8173, MT8183, MT8186,
MT8192 and MT8195.

Signed-off-by: default avatarWilliam-tw Lin <william-tw.lin@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20231222080739.21706-2-william-tw.lin@mediatek.com


Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
parent 7f79bdfe

arch/arm64/boot/dts/mediatek/mt8173.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -590,6 +590,15 @@ efuse: efuse@10206000 { 
			reg = <0 0x10206000 0 0x1000>;

			#address-cells = <1>;

			#size-cells = <1>;



			socinfo-data1@40 {

				reg = <0x040 0x4>;

			};



			socinfo-data2@44 {

				reg = <0x044 0x4>;

			};



			thermal_calibration: calib@528 {

				reg = <0x528 0xc>;

			};

arch/arm64/boot/dts/mediatek/mt8183.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -1585,6 +1585,15 @@ efuse: efuse@11f10000 { 
			reg = <0 0x11f10000 0 0x1000>;

			#address-cells = <1>;

			#size-cells = <1>;



			socinfo-data1@4c {

				reg = <0x04c 0x4>;

			};



			socinfo-data2@60 {

				reg = <0x060 0x4>;

			};



			thermal_calibration: calib@180 {

				reg = <0x180 0xc>;

			};

arch/arm64/boot/dts/mediatek/mt8186.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -1672,6 +1672,10 @@ gpu_speedbin: gpu-speedbin@59c { 
				reg = <0x59c 0x4>;

				bits = <0 3>;

			};



			socinfo-data1@7a0 {

				reg = <0x7a0 0x4>;

			};

		};



		mipi_tx0: dsi-phy@11cc0000 {

arch/arm64/boot/dts/mediatek/mt8192.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -1164,6 +1164,14 @@ efuse: efuse@11c10000 { 
			#address-cells = <1>;

			#size-cells = <1>;



			socinfo-data1@44 {

				reg = <0x044 0x4>;

			};



			socinfo-data2@50 {

				reg = <0x050 0x4>;

			};



			lvts_e_data1: data1@1c0 {

				reg = <0x1c0 0x58>;

			};

arch/arm64/boot/dts/mediatek/mt8195.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -1701,6 +1701,9 @@ lvts_efuse_data2: lvts2-calib@1d0 { 
			svs_calib_data: svs-calib@580 {

				reg = <0x580 0x64>;

			};

			socinfo-data1@7a0 {

				reg = <0x7a0 0x4>;

			};

		};



		u3phy2: t-phy@11c40000 {