Commit 95474648 authored by Martin K. Petersen's avatar Martin K. Petersen
Browse files

Merge patch series "mpi3mr: Few Enhancements and minor fix"

Ranjan Kumar <ranjan.kumar@broadcom.com> says:

Few Enhancements and minor fix of mpi3mr driver.

Link: https://lore.kernel.org/r/20240905102753.105310-1-ranjan.kumar@broadcom.com


Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parents f81eaf08 e7d67f3f
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+32 −3
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@
#define MPI3_SECURITY_PGAD_SLOT_GROUP_MASK              (0x0000ff00)
#define MPI3_SECURITY_PGAD_SLOT_GROUP_SHIFT		(8)
#define MPI3_SECURITY_PGAD_SLOT_MASK                    (0x000000ff)
#define MPI3_INSTANCE_PGAD_INSTANCE_MASK                (0x0000ffff)
struct mpi3_config_request {
	__le16             host_tag;
	u8                 ioc_use_only02;
@@ -75,7 +76,8 @@ struct mpi3_config_request {
	u8                 ioc_use_only06;
	u8                 msg_flags;
	__le16             change_count;
	__le16             reserved0a;
	u8                 proxy_ioc_number;
	u8                 reserved0b;
	u8                 page_version;
	u8                 page_number;
	u8                 page_type;
@@ -206,6 +208,9 @@ struct mpi3_config_page_header {
#define MPI3_MFGPAGE_DEVID_SAS5116_MPI_MGMT		(0x00b5)
#define MPI3_MFGPAGE_DEVID_SAS5116_NVME_MGMT		(0x00b6)
#define MPI3_MFGPAGE_DEVID_SAS5116_PCIE_SWITCH		(0x00b8)
#define MPI3_MFGPAGE_DEVID_SAS5248_MPI			(0x00f0)
#define MPI3_MFGPAGE_DEVID_SAS5248_MPI_NS		(0x00f1)
#define MPI3_MFGPAGE_DEVID_SAS5248_PCIE_SWITCH		(0x00f2)
struct mpi3_man_page0 {
	struct mpi3_config_page_header         header;
	u8                                 chip_revision[8];
@@ -1074,6 +1079,8 @@ struct mpi3_io_unit_page8 {
#define MPI3_IOUNIT8_SBSTATE_SVN_UPDATE_PENDING   (0x04)
#define MPI3_IOUNIT8_SBSTATE_KEY_UPDATE_PENDING   (0x02)
#define MPI3_IOUNIT8_SBSTATE_SECURE_BOOT_ENABLED  (0x01)
#define MPI3_IOUNIT8_SBMODE_CURRENT_KEY_IOUNIT17	(0x10)
#define MPI3_IOUNIT8_SBMODE_HARD_SECURE_RECERTIFIED	(0x08)
struct mpi3_io_unit_page9 {
	struct mpi3_config_page_header         header;
	__le32                             flags;
@@ -1089,6 +1096,8 @@ struct mpi3_io_unit_page9 {
#define MPI3_IOUNIT9_FLAGS_UBM_ENCLOSURE_ORDER_BACKPLANE_TYPE     (0x00000004)
#define MPI3_IOUNIT9_FLAGS_VDFIRST_ENABLED                        (0x00000001)
#define MPI3_IOUNIT9_FIRSTDEVICE_UNKNOWN                          (0xffff)
#define MPI3_IOUNIT9_FIRSTDEVICE_IN_DRIVER_PAGE_0                 (0xfffe)

struct mpi3_io_unit_page10 {
	struct mpi3_config_page_header         header;
	u8                                 flags;
@@ -1224,6 +1233,19 @@ struct mpi3_io_unit_page15 {
#define MPI3_IOUNIT15_FLAGS_EPRSUPPORT_WITHOUT_POWER_BRAKE_GPIO     (0x01)
#define MPI3_IOUNIT15_FLAGS_EPRSUPPORT_WITH_POWER_BRAKE_GPIO        (0x02)
#define MPI3_IOUNIT15_NUMPOWERBUDGETDATA_POWER_BUDGETING_DISABLED   (0x00)

struct mpi3_io_unit_page17 {
	struct mpi3_config_page_header         header;
	u8                                 num_instances;
	u8                                 instance;
	__le16                             reserved0a;
	__le32                             reserved0c[4];
	__le16                             key_length;
	u8                                 encryption_algorithm;
	u8                                 reserved1f;
	__le32                             current_key[];
};
#define MPI3_IOUNIT17_PAGEVERSION		(0x00)
struct mpi3_ioc_page0 {
	struct mpi3_config_page_header         header;
	__le32                             reserved08;
@@ -1311,7 +1333,7 @@ struct mpi3_driver_page0 {
	u8                                 tur_interval;
	u8                                 reserved10;
	u8                                 security_key_timeout;
	__le16                             reserved12;
	__le16                             first_device;
	__le32                             reserved14;
	__le32                             reserved18;
};
@@ -1324,10 +1346,13 @@ struct mpi3_driver_page0 {
#define MPI3_DRIVER0_BSDOPTS_REGISTRATION_IOC_AND_DEVS      (0x00000000)
#define MPI3_DRIVER0_BSDOPTS_REGISTRATION_IOC_ONLY          (0x00000001)
#define MPI3_DRIVER0_BSDOPTS_REGISTRATION_IOC_AND_INTERNAL_DEVS		(0x00000002)
#define MPI3_DRIVER0_FIRSTDEVICE_IGNORE1                            (0x0000)
#define MPI3_DRIVER0_FIRSTDEVICE_IGNORE2                            (0xffff)
struct mpi3_driver_page1 {
	struct mpi3_config_page_header         header;
	__le32                             flags;
	__le32                             reserved0c;
	u8                                 time_stamp_update;
	u8                                 reserved0d[3];
	__le16                             host_diag_trace_max_size;
	__le16                             host_diag_trace_min_size;
	__le16                             host_diag_trace_decrement_size;
@@ -2347,6 +2372,10 @@ struct mpi3_device0_vd_format {
#define MPI3_DEVICE0_VD_DEVICE_INFO_SAS                     (0x0001)
#define MPI3_DEVICE0_VD_FLAGS_IO_THROTTLE_GROUP_QD_MASK     (0xf000)
#define MPI3_DEVICE0_VD_FLAGS_IO_THROTTLE_GROUP_QD_SHIFT    (12)
#define MPI3_DEVICE0_VD_FLAGS_OSEXPOSURE_MASK               (0x0003)
#define MPI3_DEVICE0_VD_FLAGS_OSEXPOSURE_HDD                (0x0000)
#define MPI3_DEVICE0_VD_FLAGS_OSEXPOSURE_SSD                (0x0001)
#define MPI3_DEVICE0_VD_FLAGS_OSEXPOSURE_NO_GUIDANCE        (0x0002)
union mpi3_device0_dev_spec_format {
	struct mpi3_device0_sas_sata_format        sas_sata_format;
	struct mpi3_device0_pcie_format            pcie_format;
+10 −3
Original line number Diff line number Diff line
@@ -205,13 +205,14 @@ struct mpi3_encrypted_hash_entry {
	u8                         hash_image_type;
	u8                         hash_algorithm;
	u8                         encryption_algorithm;
	u8                         reserved03;
	u8                         flags;
	__le16                     public_key_size;
	__le16                     signature_size;
	__le32                     public_key[MPI3_PUBLIC_KEY_MAX];
};

#define MPI3_HASH_IMAGE_TYPE_KEY_WITH_SIGNATURE      (0x03)
#define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH           (0x03)
#define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH_1_OF_2    (0x04)
#define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH_2_OF_2    (0x05)
#define MPI3_HASH_ALGORITHM_VERSION_MASK             (0xe0)
#define MPI3_HASH_ALGORITHM_VERSION_NONE             (0x00)
#define MPI3_HASH_ALGORITHM_VERSION_SHA1             (0x20)
@@ -230,6 +231,12 @@ struct mpi3_encrypted_hash_entry {
#define MPI3_ENCRYPTION_ALGORITHM_RSA4096            (0x05)
#define MPI3_ENCRYPTION_ALGORITHM_RSA3072            (0x06)

/* hierarchical signature system (hss) */
#define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_87	    (0x0b)
#define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_65	    (0x0c)
#define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_44	    (0x0d)
#define MPI3_ENCRYPTED_HASH_ENTRY_FLAGS_PAIRED_KEY_MASK		(0x0f)

#ifndef MPI3_ENCRYPTED_HASH_ENTRY_MAX
#define MPI3_ENCRYPTED_HASH_ENTRY_MAX               (1)
#endif
+8 −0
Original line number Diff line number Diff line
@@ -39,6 +39,12 @@ struct mpi3_ioc_init_request {
#define MPI3_WHOINIT_HOST_DRIVER                         (0x03)
#define MPI3_WHOINIT_MANUFACTURER                        (0x04)

#define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_MASK              (0x00000003)
#define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_NO_GUIDANCE       (0x00000000)
#define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_NO_SPECIAL        (0x00000001)
#define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_REPORT_AS_HDD     (0x00000002)
#define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_REPORT_AS_SSD     (0x00000003)

struct mpi3_ioc_facts_request {
	__le16                 host_tag;
	u8                     ioc_use_only02;
@@ -140,6 +146,8 @@ struct mpi3_ioc_facts_data {
#define MPI3_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL           (0x0020)
#define MPI3_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL                 (0x0010)
#define MPI3_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL             (0x0008)
#define MPI3_IOCFACTS_EXCEPT_BLOCKING_BOOT_EVENT              (0x0004)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_SELFTEST_FAILURE        (0x0002)
#define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_MASK                    (0x0001)
#define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_PRIMARY                 (0x0000)
#define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SECONDARY               (0x0001)
+3 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ union mpi3_version_union {

#define MPI3_VERSION_MAJOR                                              (3)
#define MPI3_VERSION_MINOR                                              (0)
#define MPI3_VERSION_UNIT                                               (31)
#define MPI3_VERSION_UNIT                                               (34)
#define MPI3_VERSION_DEV                                                (0)
#define MPI3_DEVHANDLE_INVALID                                          (0xffff)
struct mpi3_sysif_oper_queue_indexes {
@@ -158,6 +158,7 @@ struct mpi3_sysif_registers {
#define MPI3_SYSIF_FAULT_CODE_SOFT_RESET_NEEDED                         (0x0000f004)
#define MPI3_SYSIF_FAULT_CODE_POWER_CYCLE_REQUIRED                      (0x0000f005)
#define MPI3_SYSIF_FAULT_CODE_TEMP_THRESHOLD_EXCEEDED                   (0x0000f006)
#define MPI3_SYSIF_FAULT_CODE_INSUFFICIENT_PCI_SLOT_POWER               (0x0000f007)
#define MPI3_SYSIF_FAULT_INFO0_OFFSET                                   (0x00001c14)
#define MPI3_SYSIF_FAULT_INFO1_OFFSET                                   (0x00001c18)
#define MPI3_SYSIF_FAULT_INFO2_OFFSET                                   (0x00001c1c)
@@ -410,6 +411,7 @@ struct mpi3_default_reply {
#define MPI3_IOCSTATUS_INSUFFICIENT_RESOURCES       (0x0006)
#define MPI3_IOCSTATUS_INVALID_FIELD                (0x0007)
#define MPI3_IOCSTATUS_INVALID_STATE                (0x0008)
#define MPI3_IOCSTATUS_SHUTDOWN_ACTIVE              (0x0009)
#define MPI3_IOCSTATUS_INSUFFICIENT_POWER           (0x000a)
#define MPI3_IOCSTATUS_INVALID_CHANGE_COUNT         (0x000b)
#define MPI3_IOCSTATUS_ALLOWED_CMD_BLOCK            (0x000c)
+5 −3
Original line number Diff line number Diff line
@@ -57,8 +57,8 @@ extern struct list_head mrioc_list;
extern int prot_mask;
extern atomic64_t event_counter;

#define MPI3MR_DRIVER_VERSION	"8.10.0.5.50"
#define MPI3MR_DRIVER_RELDATE	"08-Aug-2024"
#define MPI3MR_DRIVER_VERSION	"8.12.0.0.50"
#define MPI3MR_DRIVER_RELDATE	"05-Sept-2024"

#define MPI3MR_DRIVER_NAME	"mpi3mr"
#define MPI3MR_DRIVER_LICENSE	"GPL"
@@ -1090,6 +1090,7 @@ struct scmd_priv {
 * @evtack_cmds_bitmap: Event Ack bitmap
 * @delayed_evtack_cmds_list: Delayed event acknowledgment list
 * @ts_update_counter: Timestamp update counter
 * @ts_update_interval: Timestamp update interval
 * @reset_in_progress: Reset in progress flag
 * @unrecoverable: Controller unrecoverable flag
 * @prev_reset_result: Result of previous reset
@@ -1277,7 +1278,8 @@ struct mpi3mr_ioc {
	unsigned long *evtack_cmds_bitmap;
	struct list_head delayed_evtack_cmds_list;

	u32 ts_update_counter;
	u16 ts_update_counter;
	u16 ts_update_interval;
	u8 reset_in_progress;
	u8 unrecoverable;
	int prev_reset_result;
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