Commit 96326447 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Jakub Kicinski
Browse files

net: mediatek: wed: Introduce MT7992 WED support to MT7988 SoC 



Introduce the second WDMA RX ring in WED driver for MT7988 SoC since the
Mediatek MT7992 WiFi chipset supports two separated WDMA rings.
Add missing MT7988 configurations to properly support WED for MT7992 in
MT76 driver.

Co-developed-by: default avatarRex Lu <rex.lu@mediatek.com>
Signed-off-by: default avatarRex Lu <rex.lu@mediatek.com>
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20250812-mt7992-wed-support-v3-1-9ada78a819a4@kernel.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 4d18083d

drivers/net/ethernet/mediatek/mtk_wed.c

+27 −6
Original line number Diff line number Diff line
@@ -59,7 +59,9 @@ struct mtk_wed_flow_block_priv { 
static const struct mtk_wed_soc_data mt7622_data = {

	.regmap = {

		.tx_bm_tkid		= 0x088,

		.wpdma_rx_ring0		= 0x770,

		.wpdma_rx_ring = {

			0x770,

		},

		.reset_idx_tx_mask	= GENMASK(3, 0),

		.reset_idx_rx_mask	= GENMASK(17, 16),

	},
@@ -70,7 +72,9 @@ static const struct mtk_wed_soc_data mt7622_data = { 
static const struct mtk_wed_soc_data mt7986_data = {

	.regmap = {

		.tx_bm_tkid		= 0x0c8,

		.wpdma_rx_ring0		= 0x770,

		.wpdma_rx_ring = {

			0x770,

		},

		.reset_idx_tx_mask	= GENMASK(1, 0),

		.reset_idx_rx_mask	= GENMASK(7, 6),

	},
@@ -81,7 +85,10 @@ static const struct mtk_wed_soc_data mt7986_data = { 
static const struct mtk_wed_soc_data mt7988_data = {

	.regmap = {

		.tx_bm_tkid		= 0x0c8,

		.wpdma_rx_ring0		= 0x7d0,

		.wpdma_rx_ring = {

			0x7d0,

			0x7d8,

		},

		.reset_idx_tx_mask	= GENMASK(1, 0),

		.reset_idx_rx_mask	= GENMASK(7, 6),

	},
@@ -621,8 +628,8 @@ mtk_wed_amsdu_init(struct mtk_wed_device *dev) 
		return ret;

	}



	/* eagle E1 PCIE1 tx ring 22 flow control issue */

	if (dev->wlan.id == 0x7991)

	/* Kite and Eagle E1 PCIE1 tx ring 22 flow control issue */

	if (dev->wlan.id == 0x7991 || dev->wlan.id == 0x7992)

		wed_clr(dev, MTK_WED_AMSDU_FIFO, MTK_WED_AMSDU_IS_PRIOR0_RING);



	wed_set(dev, MTK_WED_CTRL, MTK_WED_CTRL_TX_AMSDU_EN);
@@ -1239,7 +1246,11 @@ mtk_wed_set_wpdma(struct mtk_wed_device *dev) 
		return;



	wed_w32(dev, MTK_WED_WPDMA_RX_GLO_CFG, dev->wlan.wpdma_rx_glo);

	wed_w32(dev, dev->hw->soc->regmap.wpdma_rx_ring0, dev->wlan.wpdma_rx);

	wed_w32(dev, dev->hw->soc->regmap.wpdma_rx_ring[0],

		dev->wlan.wpdma_rx[0]);

	if (mtk_wed_is_v3_or_greater(dev->hw))

		wed_w32(dev, dev->hw->soc->regmap.wpdma_rx_ring[1],

			dev->wlan.wpdma_rx[1]);



	if (!dev->wlan.hw_rro)

		return;
@@ -2323,6 +2334,16 @@ mtk_wed_start(struct mtk_wed_device *dev, u32 irq_mask) 
		if (!dev->rx_wdma[i].desc)

			mtk_wed_wdma_rx_ring_setup(dev, i, 16, false);



	if (dev->wlan.hw_rro) {

		for (i = 0; i < MTK_WED_RX_PAGE_QUEUES; i++) {

			u32 addr = MTK_WED_RRO_MSDU_PG_CTRL0(i) +

				   MTK_WED_RING_OFS_COUNT;



			if (!wed_r32(dev, addr))

				wed_w32(dev, addr, 1);

		}

	}



	mtk_wed_hw_init(dev);

	mtk_wed_configure_irq(dev, irq_mask);

drivers/net/ethernet/mediatek/mtk_wed.h

+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ struct mtk_wed_wo; 
struct mtk_wed_soc_data {

	struct {

		u32 tx_bm_tkid;

		u32 wpdma_rx_ring0;

		u32 wpdma_rx_ring[MTK_WED_RX_QUEUES];

		u32 reset_idx_tx_mask;

		u32 reset_idx_rx_mask;

	} regmap;

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

+3 −3
Original line number Diff line number Diff line
@@ -664,7 +664,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, 
					 MT_RXQ_WED_RING_BASE;

		wed->wlan.wpdma_rx_glo = pci_resource_start(pci_dev, 0) +

					 MT_WPDMA_GLO_CFG;

		wed->wlan.wpdma_rx = pci_resource_start(pci_dev, 0) +

		wed->wlan.wpdma_rx[0] = pci_resource_start(pci_dev, 0) +

					MT_RXQ_WED_DATA_RING_BASE;

	} else {

		struct platform_device *plat_dev = pdev_ptr;
@@ -687,7 +687,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, 
		wed->wlan.wpdma_tx = res->start + MT_TXQ_WED_RING_BASE;

		wed->wlan.wpdma_txfree = res->start + MT_RXQ_WED_RING_BASE;

		wed->wlan.wpdma_rx_glo = res->start + MT_WPDMA_GLO_CFG;

		wed->wlan.wpdma_rx = res->start + MT_RXQ_WED_DATA_RING_BASE;

		wed->wlan.wpdma_rx[0] = res->start + MT_RXQ_WED_DATA_RING_BASE;

	}

	wed->wlan.nbuf = MT7915_HW_TOKEN_SIZE;

	wed->wlan.tx_tbit[0] = is_mt7915(&dev->mt76) ? 4 : 30;

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

+6 −6
Original line number Diff line number Diff line
@@ -503,7 +503,7 @@ int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr, 
		}



		wed->wlan.wpdma_rx_glo = wed->wlan.phy_base + hif1_ofs + MT_WFDMA0_GLO_CFG;

		wed->wlan.wpdma_rx = wed->wlan.phy_base + hif1_ofs +

		wed->wlan.wpdma_rx[0] = wed->wlan.phy_base + hif1_ofs +

					MT_RXQ_RING_BASE(MT7996_RXQ_BAND0) +

					MT7996_RXQ_BAND0 * MT_RING_SIZE;
@@ -518,7 +518,7 @@ int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr, 


		wed->wlan.wpdma_rx_glo = wed->wlan.phy_base + MT_WFDMA0_GLO_CFG;



		wed->wlan.wpdma_rx = wed->wlan.phy_base +

		wed->wlan.wpdma_rx[0] = wed->wlan.phy_base +

					MT_RXQ_RING_BASE(MT7996_RXQ_BAND0) +

					MT7996_RXQ_BAND0 * MT_RING_SIZE;

include/linux/soc/mediatek/mtk_wed.h

+1 −1
Original line number Diff line number Diff line
@@ -147,7 +147,7 @@ struct mtk_wed_device { 
		u32 wpdma_tx;

		u32 wpdma_txfree;

		u32 wpdma_rx_glo;

		u32 wpdma_rx;

		u32 wpdma_rx[MTK_WED_RX_QUEUES];

		u32 wpdma_rx_rro[MTK_WED_RX_QUEUES];

		u32 wpdma_rx_pg;