Commit 97cee3dd authored by Sven Schnelle's avatar Sven Schnelle Committed by Vasily Gorbik
Browse files

s390/kdump: Make kdump ready for lowcore relocation 



In preparation of having lowcore at different address than zero,
add the base register to all lowcore accesses in store_status()
and __do_machine_kdump().

Reviewed-by: default avatarHeiko Carstens <hca@linux.ibm.com>
Signed-off-by: default avatarSven Schnelle <svens@linux.ibm.com>
Signed-off-by: default avatarVasily Gorbik <gor@linux.ibm.com>
parent 361f6ec2

arch/s390/kernel/machine_kexec.c

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ static void __do_machine_kdump(void *data) 
	 * This need to be done *after* s390_reset_system set the

	 * prefix register of this CPU to zero

	 */

	memcpy(absolute_pointer(__LC_FPREGS_SAVE_AREA),

	memcpy(absolute_pointer(get_lowcore()->floating_pt_save_area),

	       phys_to_virt(prefix + __LC_FPREGS_SAVE_AREA), 512);



	call_nodat(1, int, purgatory, int, 1);

arch/s390/kernel/reipl.S

+11 −15
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <asm/asm-offsets.h>

#include <asm/nospec-insn.h>

#include <asm/sigp.h>

#include <asm/lowcore.h>



	GEN_BR_THUNK %r9
@@ -20,20 +21,15 @@ 
# r3 = Parameter for function

#

SYM_CODE_START(store_status)

	/* Save register one and load save area base */

	stg	%r1,__LC_SAVE_AREA_RESTART

	STMG_LC	%r0,%r15,__LC_GPREGS_SAVE_AREA

	/* General purpose registers */

	lghi	%r1,__LC_GPREGS_SAVE_AREA

	stmg	%r0,%r15,0(%r1)

	mvc	8(8,%r1),__LC_SAVE_AREA_RESTART

	GET_LC	%r13

	/* Control registers */

	lghi	%r1,__LC_CREGS_SAVE_AREA

	stctg	%c0,%c15,0(%r1)

	stctg	%c0,%c15,__LC_CREGS_SAVE_AREA(%r13)

	/* Access registers */

	lghi	%r1,__LC_AREGS_SAVE_AREA

	stam	%a0,%a15,0(%r1)

	stamy	%a0,%a15,__LC_AREGS_SAVE_AREA(%r13)

	/* Floating point registers */

	lghi	%r1,__LC_FPREGS_SAVE_AREA

	lay	%r1,__LC_FPREGS_SAVE_AREA(%r13)

	std	%f0, 0x00(%r1)

	std	%f1, 0x08(%r1)

	std	%f2, 0x10(%r1)
@@ -51,21 +47,21 @@ SYM_CODE_START(store_status) 
	std	%f14,0x70(%r1)

	std	%f15,0x78(%r1)

	/* Floating point control register */

	lghi	%r1,__LC_FP_CREG_SAVE_AREA

	lay	%r1,__LC_FP_CREG_SAVE_AREA(%r13)

	stfpc	0(%r1)

	/* CPU timer */

	lghi	%r1,__LC_CPU_TIMER_SAVE_AREA

	lay	%r1,__LC_CPU_TIMER_SAVE_AREA(%r13)

	stpt	0(%r1)

	/* Store prefix register */

	lghi	%r1,__LC_PREFIX_SAVE_AREA

	lay	%r1,__LC_PREFIX_SAVE_AREA(%r13)

	stpx	0(%r1)

	/* Clock comparator - seven bytes */

	lghi	%r1,__LC_CLOCK_COMP_SAVE_AREA

	larl	%r4,clkcmp

	stckc	0(%r4)

	lay	%r1,__LC_CLOCK_COMP_SAVE_AREA(%r13)

	mvc	1(7,%r1),1(%r4)

	/* Program status word */

	lghi	%r1,__LC_PSW_SAVE_AREA

	lay	%r1,__LC_PSW_SAVE_AREA(%r13)

	epsw	%r4,%r5

	st	%r4,0(%r1)

	st	%r5,4(%r1)