Commit 97e3c6a8 authored by Mukul Joshi's avatar Mukul Joshi Committed by Alex Deucher
Browse files

drm/amdgpu: Store CU info from all XCCs for GFX v9.4.3 



Currently, we store CU info only for a single XCC assuming
that it is the same for all XCCs. However, that may not be
true. As a result, store CU info for all XCCs. This info is
later used for CU masking.

Signed-off-by: default avatarMukul Joshi <mukul.joshi@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2f06b274

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+1 −1
Original line number Diff line number Diff line
@@ -478,7 +478,7 @@ void amdgpu_amdkfd_get_cu_info(struct amdgpu_device *adev, struct kfd_cu_info *c 
	cu_info->cu_active_number = acu_info.number;

	cu_info->cu_ao_mask = acu_info.ao_cu_mask;

	memcpy(&cu_info->cu_bitmap[0], &acu_info.bitmap[0],

	       sizeof(acu_info.bitmap));

	       sizeof(cu_info->cu_bitmap));

	cu_info->num_shader_engines = adev->gfx.config.max_shader_engines;

	cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;

	cu_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

+2 −1
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ 
#define AMDGPU_GFX_LBPW_DISABLED_MODE		0x00000008L



#define AMDGPU_MAX_GC_INSTANCES		8

#define KGD_MAX_QUEUES			128



#define AMDGPU_MAX_GFX_QUEUES KGD_MAX_QUEUES

#define AMDGPU_MAX_COMPUTE_QUEUES KGD_MAX_QUEUES
@@ -257,7 +258,7 @@ struct amdgpu_cu_info { 
	uint32_t number;

	uint32_t ao_cu_mask;

	uint32_t ao_cu_bitmap[4][4];

	uint32_t bitmap[4][4];

	uint32_t bitmap[AMDGPU_MAX_GC_INSTANCES][4][4];

};



struct amdgpu_gfx_ras {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+1 −1
Original line number Diff line number Diff line
@@ -839,7 +839,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) 
		memcpy(&dev_info->cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0],

		       sizeof(adev->gfx.cu_info.ao_cu_bitmap));

		memcpy(&dev_info->cu_bitmap[0], &adev->gfx.cu_info.bitmap[0],

		       sizeof(adev->gfx.cu_info.bitmap));

		       sizeof(dev_info->cu_bitmap));

		dev_info->vram_type = adev->gmc.vram_type;

		dev_info->vram_bit_width = adev->gmc.vram_width;

		dev_info->vce_harvest_config = adev->vce.harvest_config;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+1 −1
Original line number Diff line number Diff line
@@ -9449,7 +9449,7 @@ static int gfx_v10_0_get_cu_info(struct amdgpu_device *adev, 
				gfx_v10_0_set_user_wgp_inactive_bitmap_per_sh(

					adev, disable_masks[i * 2 + j]);

			bitmap = gfx_v10_0_get_cu_active_bitmap_per_sh(adev);

			cu_info->bitmap[i][j] = bitmap;

			cu_info->bitmap[0][i][j] = bitmap;



			for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {

				if (bitmap & mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

+1 −1
Original line number Diff line number Diff line
@@ -6368,7 +6368,7 @@ static int gfx_v11_0_get_cu_info(struct amdgpu_device *adev, 
			 *    SE6: {SH0,SH1} --> {bitmap[2][2], bitmap[2][3]}

			 *    SE7: {SH0,SH1} --> {bitmap[3][2], bitmap[3][3]}

			 */

			cu_info->bitmap[i % 4][j + (i / 4) * 2] = bitmap;

			cu_info->bitmap[0][i % 4][j + (i / 4) * 2] = bitmap;



			for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {

				if (bitmap & mask)