Commit 990c29c2 authored by Matthew Brost's avatar Matthew Brost
Browse files

drm/xe: Improve schedule disable response failure 



Print Guc ID and take devcoredump on schedule disable response failure.
GuC ID is useful information and a schedule disable response failure is
possible the LRC state is corrupted so a devcoredump is helpful to debug.

Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarJonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241114022522.1951351-6-matthew.brost@intel.com
parent f62e6edf

drivers/gpu/drm/xe/xe_guc_submit.c

+4 −1
Original line number Diff line number Diff line
@@ -1124,7 +1124,10 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job) 
		if (!ret || xe_guc_read_stopped(guc)) {

trigger_reset:

			if (!ret)

				xe_gt_warn(guc_to_gt(guc), "Schedule disable failed to respond");

				xe_gt_warn(guc_to_gt(guc),

					   "Schedule disable failed to respond, guc_id=%d",

					   q->guc->id);

			xe_devcoredump(q, job);

			set_exec_queue_extra_ref(q);

			xe_exec_queue_get(q);	/* GT reset owns this */

			set_exec_queue_banned(q);