Commit 99e25e46 authored by Ivan Lipski's avatar Ivan Lipski Committed by Alex Deucher
Browse files

drm/amd/display: Add DPP & HUBP reset if power gate enabled on DCN314 



[WHY]
On DCN314, using full screen application with enabled scaling like 150%,
175%, with overlay cursor, causes a second cursor to appear when changing
planes. Dpp cache is used to track the HW cursor enable. Since power gate
is disabled for hubp & dpp in DCN314, dpp_reset() zero'ed the dpp struct,
while the dpp hardware was not power gated.

So, when plane is changed in a full screen app, and the overlay cursor is
enabled, the cache is cleared, so the cache does not represent the actual
cursor state.

[HOW]
Added conditionals for dpp & hubp reset and their pg_control functions
only if according power_gate flags are enabled.

Reviewed-by: default avatarSun peng Li <sunpeng.li@amd.com>
Signed-off-by: default avatarIvan Lipski <ivlipski@amd.com>
Signed-off-by: default avatarRay Wu <ray.wu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9c6669c2

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

+34 −3
Original line number Diff line number Diff line
@@ -55,15 +55,15 @@ 
#include "dcn20/dcn20_optc.h"

#include "dcn30/dcn30_cm_common.h"



#define DC_LOGGER_INIT(logger)

#define DC_LOGGER_INIT(logger) \

	struct dal_logger *dc_logger = logger



#define CTX \

	hws->ctx

#define REG(reg)\

	hws->regs->reg

#define DC_LOGGER \

	stream->ctx->logger



	dc_logger



#undef FN

#define FN(reg_name, field_name) \
@@ -76,6 +76,8 @@ static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable) 
	struct pipe_ctx *odm_pipe;

	int opp_cnt = 1;



	DC_LOGGER_INIT(stream->ctx->logger);



	ASSERT(dsc);

	for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe)

		opp_cnt++;
@@ -528,3 +530,32 @@ void dcn314_disable_link_output(struct dc_link *link, 


	apply_symclk_on_tx_off_wa(link);

}





void dcn314_plane_atomic_power_down(struct dc *dc,

		struct dpp *dpp,

		struct hubp *hubp)

{

	struct dce_hwseq *hws = dc->hwseq;

	DC_LOGGER_INIT(dc->ctx->logger);



	if (REG(DC_IP_REQUEST_CNTL)) {

		REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);



		if (hws->funcs.dpp_pg_control) {

			hws->funcs.dpp_pg_control(hws, dpp->inst, false);

			dpp->funcs->dpp_reset(dpp);

		}



		if (hws->funcs.hubp_pg_control) {

			hws->funcs.hubp_pg_control(hws, hubp->inst, false);

			hubp->funcs->hubp_reset(hubp);

		}



		REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

		DC_LOG_DEBUG("Power gated front end %d\n", hubp->inst);

	}



	if (hws->funcs.dpp_root_clock_control)

		hws->funcs.dpp_root_clock_control(hws, dpp->inst, false);

}

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.h

+2 −0
Original line number Diff line number Diff line
@@ -47,4 +47,6 @@ void dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, 


void dcn314_disable_link_output(struct dc_link *link, const struct link_resource *link_res, enum signal_type signal);



void dcn314_plane_atomic_power_down(struct dc *dc, struct dpp *dpp, struct hubp *hubp);



#endif /* __DC_HWSS_DCN314_H__ */

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c

+1 −1
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ static const struct hwseq_private_funcs dcn314_private_funcs = { 
	.disable_vga = dcn20_disable_vga,

	.bios_golden_init = dcn10_bios_golden_init,

	.plane_atomic_disable = dcn20_plane_atomic_disable,

	.plane_atomic_power_down = dcn10_plane_atomic_power_down,

	.plane_atomic_power_down = dcn314_plane_atomic_power_down,

	.enable_power_gating_plane = dcn314_enable_power_gating_plane,

	.dpp_root_clock_control = dcn314_dpp_root_clock_control,

	.hubp_pg_control = dcn31_hubp_pg_control,