Merge tag 'arm-multiplatform-5.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

	help

	  Support for StrongARM 11x0 based boards.

config ARCH_OMAP1

	bool "TI OMAP1"

	depends on CPU_LITTLE_ENDIAN

	select CLKSRC_MMIO

	select FORCE_PCI if PCCARD

	select GENERIC_IRQ_CHIP

	select GPIOLIB

	select HAVE_LEGACY_CLK

	select IRQ_DOMAIN

	select SPARSE_IRQ

	help

	  Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)

endchoice

menu "Multiple platform selection"

CONFIG_MODULE_UNLOAD=y

CONFIG_MODULE_FORCE_UNLOAD=y

# CONFIG_BLK_DEV_BSG is not set

CONFIG_ARCH_MULTI_V4T=y

CONFIG_ARCH_MULTI_V5=y

# CONFIG_ARCH_MULTI_V7 is not set

CONFIG_ARCH_OMAP=y

CONFIG_ARCH_OMAP1=y

CONFIG_OMAP_RESET_CLOCKS=y

# SPDX-License-Identifier: GPL-2.0-only

menuconfig ARCH_OMAP1

	bool "TI OMAP1"

	depends on ARCH_MULTI_V4T || ARCH_MULTI_V5

	depends on CPU_LITTLE_ENDIAN

	select ARCH_HAS_HOLES_MEMORYMODEL

	select ARCH_OMAP

	select CLKSRC_MMIO

	select FORCE_PCI if PCCARD

	select GPIOLIB

	help

	  Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)

if ARCH_OMAP1

menu "TI OMAP1 specific features"

comment "OMAP Core Type"

config ARCH_OMAP730

	depends on ARCH_MULTI_V5

	bool "OMAP730 Based System"

	select ARCH_OMAP_OTG

	select CPU_ARM926T

	select OMAP_MPU_TIMER

config ARCH_OMAP850

	depends on ARCH_MULTI_V5

	bool "OMAP850 Based System"

	select ARCH_OMAP_OTG

	select CPU_ARM926T

config ARCH_OMAP15XX

	depends on ARCH_MULTI_V4T

	default y

	bool "OMAP15xx Based System"

	select CPU_ARM925T

	select OMAP_MPU_TIMER

config ARCH_OMAP16XX

	depends on ARCH_MULTI_V5

	bool "OMAP16xx Based System"

	select ARCH_OMAP_OTG

	select CPU_ARM926T

#define __ARCH_ARM_MACH_OMAP1_CLOCK_H

#include <linux/clk.h>

#include <linux/list.h>

#include <linux/clkdev.h>

#include <linux/clk-provider.h>

struct module;

struct clk;

struct omap1_clk;

struct omap_clk {

	u16				cpu;

		.lk = {			\

			.dev_id = dev,	\

			.con_id = con,	\

			.clk = ck,	\

			.clk_hw = ck,	\

		},			\

	}

#define CK_16XX		(1 << 3)	/* 16xx, 17xx, 5912 */

#define CK_1710		(1 << 4)	/* 1710 extra for rate selection */

/* Temporary, needed during the common clock framework conversion */

#define __clk_get_name(clk)	(clk->name)

/**

 * struct clkops - some clock function pointers

 * @enable: fn ptr that enables the current clock in hardware

 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware

 */

struct clkops {

	int			(*enable)(struct clk *);

	void			(*disable)(struct clk *);

	int			(*enable)(struct omap1_clk *clk);

	void			(*disable)(struct omap1_clk *clk);

};

/*

#define CLOCK_NO_IDLE_PARENT	(1 << 2)

/**

 * struct clk - OMAP struct clk

 * @node: list_head connecting this clock into the full clock list

 * struct omap1_clk - OMAP1 struct clk

 * @hw: struct clk_hw for common clock framework integration

 * @ops: struct clkops * for this clock

 * @name: the name of the clock in the hardware (used in hwmod data and debug)

 * @parent: pointer to this clock's parent struct clk

 * @children: list_head connecting to the child clks' @sibling list_heads

 * @sibling: list_head connecting this clk to its parent clk's @children

 * @rate: current clock rate

 * @enable_reg: register to write to enable the clock (see @enable_bit)

 * @recalc: fn ptr that returns the clock's current rate

 * @round_rate: fn ptr that can round the clock's current rate

 * @init: fn ptr to do clock-specific initialization

 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)

 * @usecount: number of users that have requested this clock to be enabled

 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div

 * @flags: see "struct clk.flags possibilities" above

 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)

 *

 * XXX @rate_offset should probably be removed and OMAP1

 * clock code converted to use clksel.

 *

 * XXX @usecount is poorly named.  It should be "enable_count" or

 * something similar.  "users" in the description refers to kernel

 * code (core code or drivers) that have called clk_enable() and not

 * yet called clk_disable(); the usecount of parent clocks is also

 * incremented by the clock code when clk_enable() is called on child

 * clocks and decremented by the clock code when clk_disable() is

 * called on child clocks.

 *

 * XXX @usecount, @children, @sibling should be marked for

 * internal use only.

 *

 * @children and @sibling are used to optimize parent-to-child clock

 * tree traversals.  (child-to-parent traversals use @parent.)

 *

 * XXX The notion of the clock's current rate probably needs to be

 * separated from the clock's target rate.

 */

struct clk {

	struct list_head	node;

struct omap1_clk {

	struct clk_hw		hw;

	const struct clkops	*ops;

	const char		*name;

	struct clk		*parent;

	struct list_head	children;

	struct list_head	sibling;	/* node for children */

	unsigned long		rate;

	void __iomem		*enable_reg;

	unsigned long		(*recalc)(struct clk *);

	int			(*set_rate)(struct clk *, unsigned long);

	long			(*round_rate)(struct clk *, unsigned long);

	void			(*init)(struct clk *);

	unsigned long		(*recalc)(struct omap1_clk *clk, unsigned long rate);

	int			(*set_rate)(struct omap1_clk *clk, unsigned long rate,

					    unsigned long p_rate);

	long			(*round_rate)(struct omap1_clk *clk, unsigned long rate,

					      unsigned long *p_rate);

	int			(*init)(struct omap1_clk *clk);

	u8			enable_bit;

	s8			usecount;

	u8			fixed_div;

	u8			flags;

	u8			rate_offset;

#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)

	struct dentry		*dent;	/* For visible tree hierarchy */

#endif

};

#define to_omap1_clk(_hw)	container_of(_hw, struct omap1_clk, hw)

extern void clk_preinit(struct clk *clk);

extern int clk_register(struct clk *clk);

extern void clk_unregister(struct clk *clk);

extern void propagate_rate(struct clk *clk);

extern unsigned long followparent_recalc(struct clk *clk);

unsigned long omap_fixed_divisor_recalc(struct clk *clk);

void propagate_rate(struct omap1_clk *clk);

unsigned long followparent_recalc(struct omap1_clk *clk, unsigned long p_rate);

unsigned long omap_fixed_divisor_recalc(struct omap1_clk *clk, unsigned long p_rate);

extern const struct clkops clkops_null;

extern struct clk dummy_ck;

extern struct omap1_clk dummy_ck;

int omap1_clk_init(void);

void omap1_clk_late_init(void);

extern int omap1_clk_enable(struct clk *clk);

extern void omap1_clk_disable(struct clk *clk);

extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);

extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate);

extern unsigned long omap1_ckctl_recalc(struct clk *clk);

extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);

extern unsigned long omap1_sossi_recalc(struct clk *clk);

extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);

extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate);

extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate);

extern unsigned long omap1_uart_recalc(struct clk *clk);

extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate);

extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate);

extern void omap1_init_ext_clk(struct clk *clk);

extern int omap1_select_table_rate(struct clk *clk, unsigned long rate);

extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate);

extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);

extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);

#ifdef CONFIG_OMAP_RESET_CLOCKS

extern void omap1_clk_disable_unused(struct clk *clk);

#else

#define omap1_clk_disable_unused	NULL

#endif

unsigned long omap1_ckctl_recalc(struct omap1_clk *clk, unsigned long p_rate);

long omap1_round_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);

int omap1_set_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

unsigned long omap1_sossi_recalc(struct omap1_clk *clk, unsigned long p_rate);

unsigned long omap1_ckctl_recalc_dsp_domain(struct omap1_clk *clk, unsigned long p_rate);

int omap1_clk_set_rate_dsp_domain(struct omap1_clk *clk, unsigned long rate,

				  unsigned long p_rate);

long omap1_round_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);

int omap1_set_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

unsigned long omap1_uart_recalc(struct omap1_clk *clk, unsigned long p_rate);

int omap1_set_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

long omap1_round_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);

int omap1_init_ext_clk(struct omap1_clk *clk);

int omap1_select_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

long omap1_round_to_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);

int omap1_clk_set_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

long omap1_clk_round_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate,

				    unsigned long *p_rate);

struct uart_clk {

	struct clk	clk;

	struct omap1_clk	clk;

	unsigned long		sysc_addr;

};

/* Provide a method for preventing idling some ARM IDLECT clocks */

struct arm_idlect1_clk {

	struct clk	clk;

	struct omap1_clk	clk;

	unsigned long		no_idle_count;

	__u8			idlect_shift;

};

#define SOFT_REQ_REG2		0xfffe0880

extern __u32 arm_idlect1_mask;

extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;

extern struct omap1_clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;

extern const struct clkops clkops_dspck;

extern const struct clkops clkops_uart_16xx;

/* used for passing SoC type to omap1_{select,round_to}_table_rate() */

extern u32 cpu_mask;

extern const struct clk_ops omap1_clk_null_ops;

extern const struct clk_ops omap1_clk_gate_ops;

extern const struct clk_ops omap1_clk_rate_ops;

extern const struct clk_ops omap1_clk_full_ops;

#endif