Commit 9b3700b1 authored by Langyan Ye's avatar Langyan Ye Committed by Douglas Anderson
Browse files

drm/panel-edp: Add disable to 100ms for MNB601LS1-4 



For the MNB601LS1-4 panel, the T9+T10 timing does not meet the
requirements of the specification, so disable is set to 100ms.

Fixes: 9d8e9143 ("drm/panel-edp: Add CSW MNB601LS1-4")
Signed-off-by: default avatarLangyan Ye <yelangyan@huaqin.corp-partner.google.com>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20250721061627.3816612-1-yelangyan@huaqin.corp-partner.google.com
parent 94febfb5

drivers/gpu/drm/panel/panel-edp.c

+8 −1
Original line number Diff line number Diff line
@@ -1828,6 +1828,13 @@ static const struct panel_delay delay_50_500_e200_d200_po2e335 = { 
	.powered_on_to_enable = 335,

};



static const struct panel_delay delay_200_500_e50_d100 = {

	.hpd_absent = 200,

	.unprepare = 500,

	.enable = 50,

	.disable = 100,

};



#define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \

{ \

	.ident = { \
@@ -1984,7 +1991,7 @@ static const struct edp_panel_entry edp_panels[] = { 


	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"),

	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3"),

	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50, "MNB601LS1-4"),

	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50_d100, "MNB601LS1-4"),

	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1448, &delay_200_500_e50, "MNE007QS3-7"),

	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1457, &delay_80_500_e80_p2e200, "MNE007QS3-8"),