Unverified Commit 9bb66c17 authored by Andrzej Hajda's avatar Andrzej Hajda
Browse files

drm/i915: Reserve some kernel space per vm 



Reserve one page in each vm for kernel space to use for things
such as workarounds.

v2: use real memory, do not decrease vm.total
v4: reserve only one page and explain flag
v5: remove allocated object on ppgtt cleanup
v6: decrease vm->total by reservation size

Suggested-by: default avatarChris Wilson <chris.p.wilson@linux.intel.com>
Signed-off-by: default avatarAndrzej Hajda <andrzej.hajda@intel.com>
Reviewed-by: default avatarJonathan Cavitt <jonathan.cavitt@intel.com>
Reviewed-by: default avatarNirmoy Das <nirmoy.das@intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231026-wabb-v6-1-4aa7d55d0a8a@intel.com
parent 8aa519f1

drivers/gpu/drm/i915/gt/gen8_ppgtt.c

+43 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 


#include <linux/log2.h>



#include "gem/i915_gem_internal.h"

#include "gem/i915_gem_lmem.h"



#include "gen8_ppgtt.h"
@@ -222,6 +223,9 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm) 
{

	struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);



	if (vm->rsvd.obj)

		i915_gem_object_put(vm->rsvd.obj);



	if (intel_vgpu_active(vm->i915))

		gen8_ppgtt_notify_vgt(ppgtt, false);
@@ -950,6 +954,41 @@ gen8_alloc_top_pd(struct i915_address_space *vm) 
	return ERR_PTR(err);

}



static int gen8_init_rsvd(struct i915_address_space *vm)

{

	struct drm_i915_private *i915 = vm->i915;

	struct drm_i915_gem_object *obj;

	struct i915_vma *vma;

	int ret;



	/* The memory will be used only by GPU. */

	obj = i915_gem_object_create_lmem(i915, PAGE_SIZE,

					  I915_BO_ALLOC_VOLATILE |

					  I915_BO_ALLOC_GPU_ONLY);

	if (IS_ERR(obj))

		obj = i915_gem_object_create_internal(i915, PAGE_SIZE);

	if (IS_ERR(obj))

		return PTR_ERR(obj);



	vma = i915_vma_instance(obj, vm, NULL);

	if (IS_ERR(vma)) {

		ret = PTR_ERR(vma);

		goto unref;

	}



	ret = i915_vma_pin(vma, 0, 0, PIN_USER | PIN_HIGH);

	if (ret)

		goto unref;



	vm->rsvd.vma = i915_vma_make_unshrinkable(vma);

	vm->rsvd.obj = obj;

	vm->total -= vma->node.size;

	return 0;

unref:

	i915_gem_object_put(obj);

	return ret;

}



/*

 * GEN8 legacy ppgtt programming is accomplished through a max 4 PDP registers

 * with a net effect resembling a 2-level page table in normal x86 terms. Each
@@ -1031,6 +1070,10 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt, 
	if (intel_vgpu_active(gt->i915))

		gen8_ppgtt_notify_vgt(ppgtt, true);



	err = gen8_init_rsvd(&ppgtt->vm);

	if (err)

		goto err_put;



	return ppgtt;



err_put:

drivers/gpu/drm/i915/gt/intel_gtt.h

+4 −0
Original line number Diff line number Diff line
@@ -249,6 +249,10 @@ struct i915_address_space { 
	struct work_struct release_work;



	struct drm_mm mm;

	struct {

		struct drm_i915_gem_object *obj;

		struct i915_vma *vma;

	} rsvd;

	struct intel_gt *gt;

	struct drm_i915_private *i915;

	struct device *dma;