Commit 9d5db4e3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull i3c updates from Alexandre Belloni:
 "The main change is the addition of PCI bus support for mipi-i3c-hci.

  I'm also carrying an hwmon patch as it makes use of the bitops
  addition that is then mainly used by i3c drivers.

  Core:
   - Improve initialization of numbered I2C adapters

  Drivers:
   - use parity8 helper
   - dw: fix possible use-after-free
   - mipi-i3c-hci: add support for PCI bus host
   - svc: many fixes for IBI and hotjoin"

* tag 'i3c/for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux:
  i3c: master: Improve initialization of numbered I2C adapters
  i3c: master: Fix missing 'ret' assignment in set_speed()
  i3c: cdns: use parity8 helper instead of open coding it
  i3c: mipi-i3c-hci: use parity8 helper instead of open coding it
  i3c: dw: use parity8 helper instead of open coding it
  hwmon: (spd5118) Use generic parity calculation
  bitops: add generic parity calculation for u8
  i3c: mipi-i3c-hci: Add support for MIPI I3C HCI on PCI bus
  i3c: mipi-i3c-hci: Add Intel specific quirk to ring resuming
  i3c: fix kdoc parameter description for module_i3c_i2c_driver()
  i3c: dw: Fix use-after-free in dw_i3c_master driver due to race condition
parents ae8b53aa 5eb6d356
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+1 −7
Original line number Diff line number Diff line
@@ -291,12 +291,6 @@ static umode_t spd5118_is_visible(const void *_data, enum hwmon_sensor_types typ
	}
}

static inline bool spd5118_parity8(u8 w)
{
	w ^= w >> 4;
	return (0x6996 >> (w & 0xf)) & 1;
}

/*
 * Bank and vendor id are 8-bit fields with seven data bits and odd parity.
 * Vendor IDs 0 and 0x7f are invalid.
@@ -304,7 +298,7 @@ static inline bool spd5118_parity8(u8 w)
 */
static bool spd5118_vendor_valid(u8 bank, u8 id)
{
	if (!spd5118_parity8(bank) || !spd5118_parity8(id))
	if (parity8(bank) == 0 || parity8(id) == 0)
		return false;

	id &= 0x7f;
+11 −3
Original line number Diff line number Diff line
@@ -1919,7 +1919,7 @@ static int i3c_master_bus_init(struct i3c_master_controller *master)
		goto err_bus_cleanup;

	if (master->ops->set_speed) {
		master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
		ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
		if (ret)
			goto err_bus_cleanup;
	}
@@ -2486,7 +2486,7 @@ static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
	struct i2c_dev_desc *i2cdev;
	struct i2c_dev_boardinfo *i2cboardinfo;
	int ret;
	int ret, id = -ENODEV;

	adap->dev.parent = master->dev.parent;
	adap->owner = master->dev.parent->driver->owner;
@@ -2497,7 +2497,15 @@ static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
	adap->timeout = 1000;
	adap->retries = 3;

	if (master->dev.of_node)
		id = of_alias_get_id(master->dev.of_node, "i2c");

	if (id >= 0) {
		adap->nr = id;
		ret = i2c_add_numbered_adapter(adap);
	} else {
		ret = i2c_add_adapter(adap);
	}
	if (ret)
		return ret;

+11 −0
Original line number Diff line number Diff line
@@ -57,3 +57,14 @@ config MIPI_I3C_HCI

	  This driver can also be built as a module.  If so, the module will be
	  called mipi-i3c-hci.

config MIPI_I3C_HCI_PCI
	tristate "MIPI I3C Host Controller Interface PCI support"
	depends on MIPI_I3C_HCI
	depends on PCI
	help
	  Support for MIPI I3C Host Controller Interface compatible hardware
	  on the PCI bus.

	  This driver can also be built as a module. If so, the module will be
	  called mipi-i3c-hci-pci.
+4 −11
Original line number Diff line number Diff line
@@ -251,14 +251,6 @@ struct dw_i3c_i2c_dev_data {
	struct i3c_generic_ibi_pool *ibi_pool;
};

static u8 even_parity(u8 p)
{
	p ^= p >> 4;
	p &= 0xf;

	return (0x9669 >> p) & 1;
}

static bool dw_i3c_master_supports_ccc_cmd(struct i3c_master_controller *m,
					   const struct i3c_ccc_cmd *cmd)
{
@@ -848,7 +840,7 @@ static int dw_i3c_master_daa(struct i3c_master_controller *m)
	struct dw_i3c_xfer *xfer;
	struct dw_i3c_cmd *cmd;
	u32 olddevs, newdevs;
	u8 p, last_addr = 0;
	u8 last_addr = 0;
	int ret, pos;

	ret = pm_runtime_resume_and_get(master->dev);
@@ -873,9 +865,9 @@ static int dw_i3c_master_daa(struct i3c_master_controller *m)
		}

		master->devs[pos].addr = ret;
		p = even_parity(ret);
		last_addr = ret;
		ret |= (p << 7);

		ret |= parity8(ret) ? 0 : BIT(7);

		writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(ret),
		       master->regs +
@@ -1647,6 +1639,7 @@ EXPORT_SYMBOL_GPL(dw_i3c_common_probe);

void dw_i3c_common_remove(struct dw_i3c_master *master)
{
	cancel_work_sync(&master->hj_work);
	i3c_master_unregister(&master->base);

	pm_runtime_disable(master->dev);
+1 −2
Original line number Diff line number Diff line
@@ -889,8 +889,7 @@ static u32 prepare_rr0_dev_address(u32 addr)
	ret |= (addr & GENMASK(9, 7)) << 6;

	/* RR0[0] = ~XOR(addr[6:0]) */
	if (!(hweight8(addr & 0x7f) & 1))
		ret |= 1;
	ret |= parity8(addr & 0x7f) ? 0 : BIT(0);

	return ret;
}
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