Commit 9de3f3cd authored by Frank Li's avatar Frank Li Committed by Bjorn Helgaas
Browse files

PCI: dwc: Add dw_pcie_parent_bus_offset() 

Return the offset from CPU physical address to the parent bus address of
the specified element of the devicetree 'reg' property.

[bhelgaas: cpu_phy_addr -> cpu_phys_addr, return offset, split
.cpu_addr_fixup() checking and debug to separate patch]

Link: https://lore.kernel.org/r/20250315201548.858189-6-helgaas@kernel.org


Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 2ce107e0

drivers/pci/controller/dwc/pcie-designware.c

+23 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <linux/gpio/consumer.h>

#include <linux/ioport.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/platform_device.h>

#include <linux/sizes.h>

#include <linux/types.h>
@@ -1105,3 +1106,25 @@ void dw_pcie_setup(struct dw_pcie *pci) 


	dw_pcie_link_set_max_link_width(pci, pci->num_lanes);

}



resource_size_t dw_pcie_parent_bus_offset(struct dw_pcie *pci,

					  const char *reg_name,

					  resource_size_t cpu_phys_addr)

{

	struct device *dev = pci->dev;

	struct device_node *np = dev->of_node;

	int index;

	u64 reg_addr;



	/* Look up reg_name address on parent bus */

	index = of_property_match_string(np, "reg-names", reg_name);



	if (index < 0) {

		dev_err(dev, "No %s in devicetree \"reg\" property\n", reg_name);

		return 0;

	}



	of_property_read_reg(np, index, &reg_addr, NULL);



	return cpu_phys_addr - reg_addr;

}

drivers/pci/controller/dwc/pcie-designware.h

+3 −0
Original line number Diff line number Diff line
@@ -500,6 +500,9 @@ void dw_pcie_setup(struct dw_pcie *pci); 
void dw_pcie_iatu_detect(struct dw_pcie *pci);

int dw_pcie_edma_detect(struct dw_pcie *pci);

void dw_pcie_edma_remove(struct dw_pcie *pci);

resource_size_t dw_pcie_parent_bus_offset(struct dw_pcie *pci,

					  const char *reg_name,

					  resource_size_t cpu_phy_addr);



static inline void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val)

{