Commit 9e2ca541 authored by Varadarajan Narayanan's avatar Varadarajan Narayanan Committed by Bjorn Andersson
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arm64: dts: qcom: ipq5424: Add LLCC/system-cache-controller 



Add a DT node for Last level cache (aka. system cache) controller
which provides control over the last level cache present on
IPQ5424 SoCs.

Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: default avatarVaradarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20241121051935.1055222-4-quic_varada@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 256e6937

arch/arm64/boot/dts/qcom/ipq5424.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -152,6 +152,13 @@ rng: rng@4c3000 { 
			clock-names = "core";

		};



		system-cache-controller@800000 {

			compatible = "qcom,ipq5424-llcc";

			reg = <0 0x00800000 0 0x200000>;

			reg-names = "llcc0_base";

			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;

		};



		tlmm: pinctrl@1000000 {

			compatible = "qcom,ipq5424-tlmm";

			reg = <0 0x01000000 0 0x300000>;