Commit 9e56d026 authored by Michal Wajdeczko's avatar Michal Wajdeczko
Browse files

drm/xe: Allow to assign GGTT region to the VF 



VF's drivers can't modify GGTT PTEs except the range explicitly
assigned by the PF driver. To allow hardware enforcement of this
requirement, each GGTT PTE has a field with the VF number that
identifies which VF can modify that particular GGTT PTE entry.

Only PF driver can modify this field and PF driver shall do that
before VF drivers will be loaded. Add function to prepare PTEs.
Since it will be used only by the PF driver, make it available
only for CONFIG_PCI_IOV=y.

Bspec: 45015, 52395
Reviewed-by: default avatarPiotr Piórkowski <piotr.piorkowski@intel.com>
Reviewed-by: default avatarHimal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240415173937.1287-3-michal.wajdeczko@intel.com
parent c7201728

drivers/gpu/drm/xe/regs/xe_gtt_defs.h

+2 −0
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ 
#define XELPG_GGTT_PTE_PAT0	BIT_ULL(52)

#define XELPG_GGTT_PTE_PAT1	BIT_ULL(53)



#define GGTT_PTE_VFID		GENMASK_ULL(11, 2)



#define GUC_GGTT_TOP		0xFEE00000



#define XELPG_PPGTT_PTE_PAT3		BIT_ULL(62)

drivers/gpu/drm/xe/xe_ggtt.c

+44 −0
Original line number Diff line number Diff line
@@ -460,6 +460,50 @@ void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo) 
			    bo->flags & XE_BO_FLAG_GGTT_INVALIDATE);

}



#ifdef CONFIG_PCI_IOV

static u64 xe_encode_vfid_pte(u16 vfid)

{

	return FIELD_PREP(GGTT_PTE_VFID, vfid) | XE_PAGE_PRESENT;

}



static void xe_ggtt_assign_locked(struct xe_ggtt *ggtt, const struct drm_mm_node *node, u16 vfid)

{

	u64 start = node->start;

	u64 size = node->size;

	u64 end = start + size - 1;

	u64 pte = xe_encode_vfid_pte(vfid);



	lockdep_assert_held(&ggtt->lock);



	if (!drm_mm_node_allocated(node))

		return;



	while (start < end) {

		xe_ggtt_set_pte(ggtt, start, pte);

		start += XE_PAGE_SIZE;

	}



	xe_ggtt_invalidate(ggtt);

}



/**

 * xe_ggtt_assign - assign a GGTT region to the VF

 * @ggtt: the &xe_ggtt where the node belongs

 * @node: the &drm_mm_node to update

 * @vfid: the VF identifier

 *

 * This function is used by the PF driver to assign a GGTT region to the VF.

 * In addition to PTE's VFID bits 11:2 also PRESENT bit 0 is set as on some

 * platforms VFs can't modify that either.

 */

void xe_ggtt_assign(struct xe_ggtt *ggtt, const struct drm_mm_node *node, u16 vfid)

{

	mutex_lock(&ggtt->lock);

	xe_ggtt_assign_locked(ggtt, node, vfid);

	mutex_unlock(&ggtt->lock);

}

#endif



int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p)

{

	int err;

drivers/gpu/drm/xe/xe_ggtt.h

+4 −0
Original line number Diff line number Diff line
@@ -33,4 +33,8 @@ void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo); 


int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p);



#ifdef CONFIG_PCI_IOV

void xe_ggtt_assign(struct xe_ggtt *ggtt, const struct drm_mm_node *node, u16 vfid);

#endif



#endif