Commit 9f3fef23 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Will Deacon
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iommu/qcom: Disable and reset context bank before programming 



Writing	the new	TTBRs, TCRs and MAIRs on a previously enabled
context bank may trigger a context fault, resulting in firmware
driven AP resets: change the domain initialization programming
sequence to disable the context bank(s) and to also clear the
related fault address (CB_FAR) and fault status (CB_FSR)
registers before writing new values to TTBR0/1, TCR/TCR2, MAIR0/1.

Fixes: 0ae349a0 ("iommu/qcom: Add qcom_iommu")
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230622092742.74819-4-angelogioacchino.delregno@collabora.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent fcf226f1

drivers/iommu/arm/arm-smmu/qcom_iommu.c

+7 −0
Original line number Diff line number Diff line
@@ -273,6 +273,13 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain, 
			ctx->secure_init = true;

		}



		/* Disable context bank before programming */

		iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);



		/* Clear context bank fault address fault status registers */

		iommu_writel(ctx, ARM_SMMU_CB_FAR, 0);

		iommu_writel(ctx, ARM_SMMU_CB_FSR, ARM_SMMU_FSR_FAULT);



		/* TTBRs */

		iommu_writeq(ctx, ARM_SMMU_CB_TTBR0,

				pgtbl_cfg.arm_lpae_s1_cfg.ttbr |