Commit 9f9a7265 authored by Pawel Dembicki's avatar Pawel Dembicki Committed by David S. Miller
Browse files

net: dsa: vsc73xx: allow phy resetting 



Resetting the VSC73xx PHY was problematic because the MDIO bus, without
a busy check, read and wrote incorrect register values.

My investigation indicates that resetting the PHY only triggers changes
in configuration. However, improper register values written earlier
were only exposed after a soft reset.

The reset itself wasn't the issue; rather, the problem stemmed from
incorrect read and write operations.

A 'soft_reset' can now proceed normally. There are no reasons to keep
the VSC73xx from being reset.

This commit removes the reset blockade in the 'vsc73xx_phy_write'
function.

Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: default avatarFlorian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: default avatarPawel Dembicki <paweldembicki@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent fa63c643

drivers/net/dsa/vitesse-vsc73xx-core.c

+0 −11
Original line number Diff line number Diff line
@@ -598,17 +598,6 @@ static int vsc73xx_phy_write(struct dsa_switch *ds, int phy, int regnum, 
	if (ret)

		return ret;



	/* It was found through tedious experiments that this router

	 * chip really hates to have it's PHYs reset. They

	 * never recover if that happens: autonegotiation stops

	 * working after a reset. Just filter out this command.

	 * (Resetting the whole chip is OK.)

	 */

	if (regnum == 0 && (val & BIT(15))) {

		dev_info(vsc->dev, "reset PHY - disallowed\n");

		return 0;

	}



	cmd = (phy << 21) | (regnum << 16) | val;

	ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, 0, 1, cmd);

	if (ret)