Commit a00ee801 authored by Aradhya Bhatia's avatar Aradhya Bhatia Committed by Vignesh Raghavendra
Browse files

arm64: dts: ti: k3-am625: Add OLDI support 



The AM625 SoC has 2 OLDI TXes under the DSS. Add their support.

Signed-off-by: default avatarAradhya Bhatia <a-bhatia1@ti.com>
Signed-off-by: default avatarSwamil Jain <s-jain1@ti.com>
Reviewed-by: default avatarDevarsh Thakkar <devarsht@ti.com>
Link: https://patch.msgid.link/20250913064205.4152249-3-s-jain1@ti.com


Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent 779ea073

arch/arm64/boot/dts/ti/k3-am62-main.dtsi

+47 −0
Original line number Diff line number Diff line
@@ -793,6 +793,53 @@ dss: dss@30200000 { 
		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";



		oldi-transmitters {

			#address-cells = <1>;

			#size-cells = <0>;



			oldi0: oldi@0 {

				reg = <0>;

				clocks = <&k3_clks 186 0>;

				clock-names = "serial";

				ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;

				status = "disabled";



				ports {

					#address-cells = <1>;

					#size-cells = <0>;



					oldi0_port0: port@0 {

						reg = <0>;

					};



					oldi0_port1: port@1 {

						reg = <1>;

					};

				};

			};



			oldi1: oldi@1 {

				reg = <1>;

				clocks = <&k3_clks 186 0>;

				clock-names = "serial";

				ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;

				status = "disabled";



				ports {

					#address-cells = <1>;

					#size-cells = <0>;



					oldi1_port0: port@0 {

						reg = <0>;

					};



					oldi1_port1: port@1 {

						reg = <1>;

					};

				};

			};

		};



		dss_ports: ports {

			#address-cells = <1>;

			#size-cells = <0>;