Commit a0ea91db authored by Lucas De Marchi's avatar Lucas De Marchi Committed by Rodrigo Vivi
Browse files

drm/xe: Rename pte/pde encoding functions 



Remove the leftover TODO by renameing the functions to use xe prefix.
Since the static __gen8_pte_encode() already has a double score,
just remove the prefix.

Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20230611222447.2837573-1-lucas.demarchi@intel.com


Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 6713ee6c

drivers/gpu/drm/xe/tests/xe_migrate.c

+1 −1
Original line number Diff line number Diff line
@@ -300,7 +300,7 @@ static void xe_migrate_sanity_test(struct xe_migrate *m, struct kunit *test) 
	/* First part of the test, are we updating our pagetable bo with a new entry? */

	xe_map_wr(xe, &bo->vmap, XE_PAGE_SIZE * (NUM_KERNEL_PDE - 1), u64,

		  0xdeaddeadbeefbeef);

	expected = gen8_pte_encode(NULL, pt, 0, XE_CACHE_WB, 0, 0);

	expected = xe_pte_encode(NULL, pt, 0, XE_CACHE_WB, 0, 0);

	if (m->eng->vm->flags & XE_VM_FLAGS_64K)

		expected |= XE_PTE_PS64;

	if (xe_bo_is_vram(pt))

drivers/gpu/drm/xe/xe_migrate.c

+10 −10
Original line number Diff line number Diff line
@@ -189,14 +189,14 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, 
		return ret;

	}



	entry = gen8_pde_encode(bo, bo->size - XE_PAGE_SIZE, XE_CACHE_WB);

	entry = xe_pde_encode(bo, bo->size - XE_PAGE_SIZE, XE_CACHE_WB);

	xe_pt_write(xe, &vm->pt_root[id]->bo->vmap, 0, entry);



	map_ofs = (num_entries - num_level) * XE_PAGE_SIZE;



	/* Map the entire BO in our level 0 pt */

	for (i = 0, level = 0; i < num_entries; level++) {

		entry = gen8_pte_encode(NULL, bo, i * XE_PAGE_SIZE,

		entry = xe_pte_encode(NULL, bo, i * XE_PAGE_SIZE,

				      XE_CACHE_WB, 0, 0);



		xe_map_wr(xe, &bo->vmap, map_ofs + level * 8, u64, entry);
@@ -215,7 +215,7 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, 
		for (i = 0; i < batch->size;

		     i += vm->flags & XE_VM_FLAGS_64K ? XE_64K_PAGE_SIZE :

		     XE_PAGE_SIZE) {

			entry = gen8_pte_encode(NULL, batch, i,

			entry = xe_pte_encode(NULL, batch, i,

					      XE_CACHE_WB, 0, 0);



			xe_map_wr(xe, &bo->vmap, map_ofs + level * 8, u64,
@@ -242,7 +242,7 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, 
		if (vm->flags & XE_VM_FLAGS_64K && level == 1)

			flags = XE_PDE_64K;



		entry = gen8_pde_encode(bo, map_ofs + (level - 1) *

		entry = xe_pde_encode(bo, map_ofs + (level - 1) *

					XE_PAGE_SIZE, XE_CACHE_WB);

		xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE * level, u64,

			  entry | flags);
@@ -250,7 +250,7 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, 


	/* Write PDE's that point to our BO. */

	for (i = 0; i < num_entries - num_level; i++) {

		entry = gen8_pde_encode(bo, i * XE_PAGE_SIZE,

		entry = xe_pde_encode(bo, i * XE_PAGE_SIZE,

				      XE_CACHE_WB);



		xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE +
@@ -1231,7 +1231,7 @@ xe_migrate_update_pgtables(struct xe_migrate *m, 


			BUG_ON(pt_bo->size != SZ_4K);



			addr = gen8_pte_encode(NULL, pt_bo, 0, XE_CACHE_WB,

			addr = xe_pte_encode(NULL, pt_bo, 0, XE_CACHE_WB,

					     0, 0);

			bb->cs[bb->len++] = lower_32_bits(addr);

			bb->cs[bb->len++] = upper_32_bits(addr);

drivers/gpu/drm/xe/xe_pt.c

+18 −20
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ static struct xe_pt *xe_pt_entry(struct xe_pt_dir *pt_dir, unsigned int index) 
}



/**

 * gen8_pde_encode() - Encode a page-table directory entry pointing to

 * xe_pde_encode() - Encode a page-table directory entry pointing to

 * another page-table.

 * @bo: The page-table bo of the page-table to point to.

 * @bo_offset: Offset in the page-table bo to point to.
@@ -57,7 +57,7 @@ static struct xe_pt *xe_pt_entry(struct xe_pt_dir *pt_dir, unsigned int index) 
 *

 * Return: An encoded page directory entry. No errors.

 */

u64 gen8_pde_encode(struct xe_bo *bo, u64 bo_offset,

u64 xe_pde_encode(struct xe_bo *bo, u64 bo_offset,

		  const enum xe_cache_level level)

{

	u64 pde;
@@ -97,7 +97,7 @@ static dma_addr_t vma_addr(struct xe_vma *vma, u64 offset, 
	}

}



static u64 __gen8_pte_encode(u64 pte, enum xe_cache_level cache, u32 flags,

static u64 __pte_encode(u64 pte, enum xe_cache_level cache, u32 flags,

			u32 pt_level)

{

	pte |= XE_PAGE_PRESENT | XE_PAGE_RW;
@@ -131,7 +131,7 @@ static u64 __gen8_pte_encode(u64 pte, enum xe_cache_level cache, u32 flags, 
}



/**

 * gen8_pte_encode() - Encode a page-table entry pointing to memory.

 * xe_pte_encode() - Encode a page-table entry pointing to memory.

 * @vma: The vma representing the memory to point to.

 * @bo: If @vma is NULL, representing the memory to point to.

 * @offset: The offset into @vma or @bo.
@@ -140,11 +140,9 @@ static u64 __gen8_pte_encode(u64 pte, enum xe_cache_level cache, u32 flags, 
 * @pt_level: The page-table level of the page-table into which the entry

 * is to be inserted.

 *

 * TODO: Rename.

 *

 * Return: An encoded page-table entry. No errors.

 */

u64 gen8_pte_encode(struct xe_vma *vma, struct xe_bo *bo,

u64 xe_pte_encode(struct xe_vma *vma, struct xe_bo *bo,

		  u64 offset, enum xe_cache_level cache,

		  u32 flags, u32 pt_level)

{
@@ -162,7 +160,7 @@ u64 gen8_pte_encode(struct xe_vma *vma, struct xe_bo *bo, 
			pte |= XE_USM_PPGTT_PTE_AE;

	}



	return __gen8_pte_encode(pte, cache, flags, pt_level);

	return __pte_encode(pte, cache, flags, pt_level);

}



static u64 __xe_pt_empty_pte(struct xe_tile *tile, struct xe_vm *vm,
@@ -174,12 +172,12 @@ static u64 __xe_pt_empty_pte(struct xe_tile *tile, struct xe_vm *vm, 
		return 0;



	if (level == 0) {

		u64 empty = gen8_pte_encode(NULL, vm->scratch_bo[id], 0,

		u64 empty = xe_pte_encode(NULL, vm->scratch_bo[id], 0,

					  XE_CACHE_WB, 0, 0);



		return empty;

	} else {

		return gen8_pde_encode(vm->scratch_pt[id][level - 1]->bo, 0,

		return xe_pde_encode(vm->scratch_pt[id][level - 1]->bo, 0,

				     XE_CACHE_WB);

	}

}
@@ -634,7 +632,7 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset, 


		XE_WARN_ON(xe_walk->va_curs_start != addr);



		pte = __gen8_pte_encode(xe_res_dma(curs) + xe_walk->dma_offset,

		pte = __pte_encode(xe_res_dma(curs) + xe_walk->dma_offset,

				   xe_walk->cache, xe_walk->pte_flags,

				   level);

		pte |= xe_walk->default_pte;
@@ -699,7 +697,7 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset, 
			xe_child->is_compact = true;

		}



		pte = gen8_pde_encode(xe_child->bo, 0, xe_walk->cache) | flags;

		pte = xe_pde_encode(xe_child->bo, 0, xe_walk->cache) | flags;

		ret = xe_pt_insert_entry(xe_walk, xe_parent, offset, xe_child,

					 pte);

	}

drivers/gpu/drm/xe/xe_pt.h

+5 −5
Original line number Diff line number Diff line
@@ -45,10 +45,10 @@ __xe_pt_unbind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_engine *e 


bool xe_pt_zap_ptes(struct xe_tile *tile, struct xe_vma *vma);



u64 gen8_pde_encode(struct xe_bo *bo, u64 bo_offset,

u64 xe_pde_encode(struct xe_bo *bo, u64 bo_offset,

		  const enum xe_cache_level level);



u64 gen8_pte_encode(struct xe_vma *vma, struct xe_bo *bo,

u64 xe_pte_encode(struct xe_vma *vma, struct xe_bo *bo,

		  u64 offset, enum xe_cache_level cache,

		  u32 flags, u32 pt_level);

#endif

drivers/gpu/drm/xe/xe_vm.c

+2 −2
Original line number Diff line number Diff line
@@ -1530,7 +1530,7 @@ struct xe_vm *xe_vm_lookup(struct xe_file *xef, u32 id) 


u64 xe_vm_pdp4_descriptor(struct xe_vm *vm, struct xe_tile *tile)

{

	return gen8_pde_encode(vm->pt_root[tile->id]->bo, 0,

	return xe_pde_encode(vm->pt_root[tile->id]->bo, 0,

			     XE_CACHE_WB);

}