Commit a12372ac authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by Jakub Kicinski
Browse files

net: dsa: mv88e6xxx: rename TAI definitions according to core 



The TAI_EVENT_STATUS and TAI_CFG definitions are only used for the
88E6352-family of TAI implementations. Rename them as such, and
remove the TAI_EVENT_TIME_* definitions that are unused (although
we read them as a block.)

Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: default avatarVladimir Oltean <olteanv@gmail.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent e218ae40

drivers/net/dsa/mv88e6xxx/ptp.c

+12 −12
Original line number Diff line number Diff line
@@ -144,7 +144,7 @@ static u64 mv88e6352_ptp_clock_read(struct cyclecounter *cc) 
	u16 phc_time[2];

	int err;



	err = mv88e6xxx_tai_read(chip, MV88E6XXX_TAI_TIME_LO, phc_time,

	err = mv88e6xxx_tai_read(chip, MV88E6352_TAI_TIME_LO, phc_time,

				 ARRAY_SIZE(phc_time));

	if (err)

		return 0;
@@ -158,7 +158,7 @@ static u64 mv88e6165_ptp_clock_read(struct cyclecounter *cc) 
	u16 phc_time[2];

	int err;



	err = mv88e6xxx_tai_read(chip, MV88E6XXX_PTP_GC_TIME_LO, phc_time,

	err = mv88e6xxx_tai_read(chip, MV88E6165_PTP_GC_TIME_LO, phc_time,

				 ARRAY_SIZE(phc_time));

	if (err)

		return 0;
@@ -176,17 +176,17 @@ static int mv88e6352_config_eventcap(struct mv88e6xxx_chip *chip, int rising) 
	u16 evcap_config;

	int err;



	evcap_config = MV88E6XXX_TAI_CFG_CAP_OVERWRITE |

		       MV88E6XXX_TAI_CFG_CAP_CTR_START;

	evcap_config = MV88E6352_TAI_CFG_CAP_OVERWRITE |

		       MV88E6352_TAI_CFG_CAP_CTR_START;

	if (!rising)

		evcap_config |= MV88E6XXX_TAI_CFG_EVREQ_FALLING;

		evcap_config |= MV88E6352_TAI_CFG_EVREQ_FALLING;



	err = mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_CFG, evcap_config);

	err = mv88e6xxx_tai_write(chip, MV88E6352_TAI_CFG, evcap_config);

	if (err)

		return err;



	/* Write the capture config; this also clears the capture counter */

	return mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_EVENT_STATUS, 0);

	return mv88e6xxx_tai_write(chip, MV88E6352_TAI_EVENT_STATUS, 0);

}



static void mv88e6352_tai_event_work(struct work_struct *ugly)
@@ -199,7 +199,7 @@ static void mv88e6352_tai_event_work(struct work_struct *ugly) 
	int err;



	mv88e6xxx_reg_lock(chip);

	err = mv88e6xxx_tai_read(chip, MV88E6XXX_TAI_EVENT_STATUS,

	err = mv88e6xxx_tai_read(chip, MV88E6352_TAI_EVENT_STATUS,

				 status, ARRAY_SIZE(status));

	mv88e6xxx_reg_unlock(chip);
@@ -207,19 +207,19 @@ static void mv88e6352_tai_event_work(struct work_struct *ugly) 
		dev_err(chip->dev, "failed to read TAI status register\n");

		return;

	}

	if (status[0] & MV88E6XXX_TAI_EVENT_STATUS_ERROR) {

	if (status[0] & MV88E6352_TAI_EVENT_STATUS_ERROR) {

		dev_warn(chip->dev, "missed event capture\n");

		return;

	}

	if (!(status[0] & MV88E6XXX_TAI_EVENT_STATUS_VALID))

	if (!(status[0] & MV88E6352_TAI_EVENT_STATUS_VALID))

		goto out;



	raw_ts = ((u32)status[2] << 16) | status[1];



	/* Clear the valid bit so the next timestamp can come in */

	status[0] &= ~MV88E6XXX_TAI_EVENT_STATUS_VALID;

	status[0] &= ~MV88E6352_TAI_EVENT_STATUS_VALID;

	mv88e6xxx_reg_lock(chip);

	err = mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_EVENT_STATUS, status[0]);

	err = mv88e6xxx_tai_write(chip, MV88E6352_TAI_EVENT_STATUS, status[0]);

	mv88e6xxx_reg_unlock(chip);

	if (err) {

		dev_err(chip->dev, "failed to write TAI status register\n");

drivers/net/dsa/mv88e6xxx/ptp.h

+22 −25
Original line number Diff line number Diff line
@@ -16,19 +16,19 @@ 
#include "chip.h"



/* Offset 0x00: TAI Global Config */

#define MV88E6XXX_TAI_CFG			0x00

#define MV88E6XXX_TAI_CFG_CAP_OVERWRITE		0x8000

#define MV88E6XXX_TAI_CFG_CAP_CTR_START		0x4000

#define MV88E6XXX_TAI_CFG_EVREQ_FALLING		0x2000

#define MV88E6XXX_TAI_CFG_TRIG_ACTIVE_LO	0x1000

#define MV88E6XXX_TAI_CFG_IRL_ENABLE		0x0400

#define MV88E6XXX_TAI_CFG_TRIG_IRQ_EN		0x0200

#define MV88E6XXX_TAI_CFG_EVREQ_IRQ_EN		0x0100

#define MV88E6XXX_TAI_CFG_TRIG_LOCK		0x0080

#define MV88E6XXX_TAI_CFG_BLOCK_UPDATE		0x0008

#define MV88E6XXX_TAI_CFG_MULTI_PTP		0x0004

#define MV88E6XXX_TAI_CFG_TRIG_MODE_ONESHOT	0x0002

#define MV88E6XXX_TAI_CFG_TRIG_ENABLE		0x0001

#define MV88E6352_TAI_CFG			0x00

#define MV88E6352_TAI_CFG_CAP_OVERWRITE		0x8000

#define MV88E6352_TAI_CFG_CAP_CTR_START		0x4000

#define MV88E6352_TAI_CFG_EVREQ_FALLING		0x2000

#define MV88E6352_TAI_CFG_TRIG_ACTIVE_LO	0x1000

#define MV88E6352_TAI_CFG_IRL_ENABLE		0x0400

#define MV88E6352_TAI_CFG_TRIG_IRQ_EN		0x0200

#define MV88E6352_TAI_CFG_EVREQ_IRQ_EN		0x0100

#define MV88E6352_TAI_CFG_TRIG_LOCK		0x0080

#define MV88E6352_TAI_CFG_BLOCK_UPDATE		0x0008

#define MV88E6352_TAI_CFG_MULTI_PTP		0x0004

#define MV88E6352_TAI_CFG_TRIG_MODE_ONESHOT	0x0002

#define MV88E6352_TAI_CFG_TRIG_ENABLE		0x0001



/* Offset 0x01: Timestamp Clock Period (ps) */

#define MV88E6XXX_TAI_CLOCK_PERIOD		0x01
@@ -53,18 +53,15 @@ 
#define MV88E6XXX_TAI_IRL_COMP_PS		0x08



/* Offset 0x09: Event Status */

#define MV88E6XXX_TAI_EVENT_STATUS		0x09

#define MV88E6XXX_TAI_EVENT_STATUS_ERROR	0x0200

#define MV88E6XXX_TAI_EVENT_STATUS_VALID	0x0100

#define MV88E6XXX_TAI_EVENT_STATUS_CTR_MASK	0x00ff



/* Offset 0x0A/0x0B: Event Time */

#define MV88E6XXX_TAI_EVENT_TIME_LO		0x0a

#define MV88E6XXX_TAI_EVENT_TYPE_HI		0x0b

#define MV88E6352_TAI_EVENT_STATUS		0x09

#define MV88E6352_TAI_EVENT_STATUS_ERROR	0x0200

#define MV88E6352_TAI_EVENT_STATUS_VALID	0x0100

#define MV88E6352_TAI_EVENT_STATUS_CTR_MASK	0x00ff

/* Offset 0x0A/0x0B: Event Time Lo/Hi. Always read with Event Status. */



/* Offset 0x0E/0x0F: PTP Global Time */

#define MV88E6XXX_TAI_TIME_LO			0x0e

#define MV88E6XXX_TAI_TIME_HI			0x0f

#define MV88E6352_TAI_TIME_LO			0x0e

#define MV88E6352_TAI_TIME_HI			0x0f



/* Offset 0x10/0x11: Trig Generation Time */

#define MV88E6XXX_TAI_TRIG_TIME_LO		0x10
@@ -101,8 +98,8 @@ 
#define MV88E6XXX_PTP_GC_INT_STATUS		0x08



/* Offset 0x9/0xa: Global Time */

#define MV88E6XXX_PTP_GC_TIME_LO		0x09

#define MV88E6XXX_PTP_GC_TIME_HI		0x0A

#define MV88E6165_PTP_GC_TIME_LO		0x09

#define MV88E6165_PTP_GC_TIME_HI		0x0A



/* 6165 Per Port Registers */

/* Offset 0: Arrival Time 0 Status */