Commit a1e0a6b5 authored by Harish Kasiviswanathan's avatar Harish Kasiviswanathan Committed by Alex Deucher
Browse files

drm/amdgpu: Set vmid0 PAGE_TABLE_DEPTH for GFX12.1



GFX12.1 uses 2 level gart table. Set the context register appropriately

Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: default avatarHarish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: default avatarMukul Joshi <mukul.joshi@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 73463e26
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+4 −1
Original line number Diff line number Diff line
@@ -395,7 +395,10 @@ static void mmhub_v4_2_0_mid_enable_system_domain(struct amdgpu_device *adev,
		tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
				    ENABLE_CONTEXT, 1);
		tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
				    PAGE_TABLE_DEPTH, 0);
				    PAGE_TABLE_DEPTH, adev->gmc.vmid0_page_table_depth);
		tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
				    PAGE_TABLE_BLOCK_SIZE,
				    adev->gmc.vmid0_page_table_block_size);
		tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
				    RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
		WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),