Commit a31b4dcf authored by Bartosz Golaszewski's avatar Bartosz Golaszewski Committed by Stephen Boyd
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clk: davinci: remove support for da830 



This SoC has some leftover code all over the kernel but no boards are
supported anymore. Remove support for da830 from the davinci clock
driver. With it: remove the ifdefs around the data structures as the
da850 remains the only davinci SoC supported and the only user of this
driver.

Signed-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20250304133423.100884-1-brgl@bgdev.pl


Acked-by: default avatarDavid Lechner <david@lechnology.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 944b074f

drivers/clk/davinci/Makefile

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@@ -4,10 +4,8 @@ ifeq ($(CONFIG_COMMON_CLK), y) 
obj-$(CONFIG_ARCH_DAVINCI_DA8XX)	+= da8xx-cfgchip.o



obj-y += pll.o

obj-$(CONFIG_ARCH_DAVINCI_DA830)	+= pll-da830.o

obj-$(CONFIG_ARCH_DAVINCI_DA850)	+= pll-da850.o



obj-y += psc.o

obj-$(CONFIG_ARCH_DAVINCI_DA830)	+= psc-da830.o

obj-$(CONFIG_ARCH_DAVINCI_DA850)	+= psc-da850.o

endif

drivers/clk/davinci/pll-da830.c

deleted100644 → 0
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Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * PLL clock descriptions for TI DA830/OMAP-L137/AM17XX

 *

 * Copyright (C) 2018 David Lechner <david@lechnology.com>

 */



#include <linux/clkdev.h>

#include <linux/clk/davinci.h>

#include <linux/bitops.h>

#include <linux/init.h>

#include <linux/types.h>



#include "pll.h"



static const struct davinci_pll_clk_info da830_pll_info = {

	.name = "pll0",

	.pllm_mask = GENMASK(4, 0),

	.pllm_min = 4,

	.pllm_max = 32,

	.pllout_min_rate = 300000000,

	.pllout_max_rate = 600000000,

	.flags = PLL_HAS_CLKMODE | PLL_HAS_PREDIV | PLL_HAS_POSTDIV,

};



/*

 * NB: Technically, the clocks flagged as SYSCLK_FIXED_DIV are "fixed ratio",

 * meaning that we could change the divider as long as we keep the correct

 * ratio between all of the clocks, but we don't support that because there is

 * currently not a need for it.

 */



SYSCLK(2, pll0_sysclk2, pll0_pllen, 5, SYSCLK_FIXED_DIV);

SYSCLK(3, pll0_sysclk3, pll0_pllen, 5, 0);

SYSCLK(4, pll0_sysclk4, pll0_pllen, 5, SYSCLK_FIXED_DIV);

SYSCLK(5, pll0_sysclk5, pll0_pllen, 5, 0);

SYSCLK(6, pll0_sysclk6, pll0_pllen, 5, SYSCLK_FIXED_DIV);

SYSCLK(7, pll0_sysclk7, pll0_pllen, 5, 0);



int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip)

{

	struct clk *clk;



	davinci_pll_clk_register(dev, &da830_pll_info, "ref_clk", base, cfgchip);



	clk = davinci_pll_sysclk_register(dev, &pll0_sysclk2, base);

	clk_register_clkdev(clk, "pll0_sysclk2", "da830-psc0");

	clk_register_clkdev(clk, "pll0_sysclk2", "da830-psc1");



	clk = davinci_pll_sysclk_register(dev, &pll0_sysclk3, base);

	clk_register_clkdev(clk, "pll0_sysclk3", "da830-psc0");



	clk = davinci_pll_sysclk_register(dev, &pll0_sysclk4, base);

	clk_register_clkdev(clk, "pll0_sysclk4", "da830-psc0");

	clk_register_clkdev(clk, "pll0_sysclk4", "da830-psc1");



	clk = davinci_pll_sysclk_register(dev, &pll0_sysclk5, base);

	clk_register_clkdev(clk, "pll0_sysclk5", "da830-psc1");



	clk = davinci_pll_sysclk_register(dev, &pll0_sysclk6, base);

	clk_register_clkdev(clk, "pll0_sysclk6", "da830-psc0");



	clk = davinci_pll_sysclk_register(dev, &pll0_sysclk7, base);



	clk = davinci_pll_auxclk_register(dev, "pll0_auxclk", base);

	clk_register_clkdev(clk, NULL, "i2c_davinci.1");

	clk_register_clkdev(clk, "timer0", NULL);

	clk_register_clkdev(clk, NULL, "davinci-wdt");



	return 0;

}

drivers/clk/davinci/pll.c

+0 −9
Original line number Diff line number Diff line
@@ -840,25 +840,16 @@ int of_davinci_pll_init(struct device *dev, struct device_node *node, 
}



/* needed in early boot for clocksource/clockevent */

#ifdef CONFIG_ARCH_DAVINCI_DA850

CLK_OF_DECLARE(da850_pll0, "ti,da850-pll0", of_da850_pll0_init);

#endif



static const struct of_device_id davinci_pll_of_match[] = {

#ifdef CONFIG_ARCH_DAVINCI_DA850

	{ .compatible = "ti,da850-pll1", .data = of_da850_pll1_init },

#endif

	{ }

};



static const struct platform_device_id davinci_pll_id_table[] = {

#ifdef CONFIG_ARCH_DAVINCI_DA830

	{ .name = "da830-pll",   .driver_data = (kernel_ulong_t)da830_pll_init   },

#endif

#ifdef CONFIG_ARCH_DAVINCI_DA850

	{ .name = "da850-pll0",  .driver_data = (kernel_ulong_t)da850_pll0_init  },

	{ .name = "da850-pll1",  .driver_data = (kernel_ulong_t)da850_pll1_init  },

#endif

	{ }

};

drivers/clk/davinci/psc-da830.c

deleted100644 → 0
+0 −118
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * PSC clock descriptions for TI DA830/OMAP-L137/AM17XX

 *

 * Copyright (C) 2018 David Lechner <david@lechnology.com>

 */



#include <linux/clk-provider.h>

#include <linux/clk.h>

#include <linux/clkdev.h>

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/types.h>



#include "psc.h"



LPSC_CLKDEV1(aemif_clkdev,	NULL,	"ti-aemif");

LPSC_CLKDEV1(spi0_clkdev,	NULL,	"spi_davinci.0");

LPSC_CLKDEV1(mmcsd_clkdev,	NULL,	"da830-mmc.0");

LPSC_CLKDEV1(uart0_clkdev,	NULL,	"serial8250.0");



static const struct davinci_lpsc_clk_info da830_psc0_info[] = {

	LPSC(0,  0, tpcc,     pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(1,  0, tptc0,    pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(2,  0, tptc1,    pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(3,  0, aemif,    pll0_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED),

	LPSC(4,  0, spi0,     pll0_sysclk2, spi0_clkdev,  0),

	LPSC(5,  0, mmcsd,    pll0_sysclk2, mmcsd_clkdev, 0),

	LPSC(6,  0, aintc,    pll0_sysclk4, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(7,  0, arm_rom,  pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(8,  0, secu_mgr, pll0_sysclk4, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(9,  0, uart0,    pll0_sysclk2, uart0_clkdev, 0),

	LPSC(10, 0, scr0_ss,  pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(11, 0, scr1_ss,  pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(12, 0, scr2_ss,  pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(13, 0, pruss,    pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),

	LPSC(14, 0, arm,      pll0_sysclk6, NULL,         LPSC_ALWAYS_ENABLED),

	{ }

};



static int da830_psc0_init(struct device *dev, void __iomem *base)

{

	return davinci_psc_register_clocks(dev, da830_psc0_info, 16, base);

}



static struct clk_bulk_data da830_psc0_parent_clks[] = {

	{ .id = "pll0_sysclk2" },

	{ .id = "pll0_sysclk3" },

	{ .id = "pll0_sysclk4" },

	{ .id = "pll0_sysclk6" },

};



const struct davinci_psc_init_data da830_psc0_init_data = {

	.parent_clks		= da830_psc0_parent_clks,

	.num_parent_clks	= ARRAY_SIZE(da830_psc0_parent_clks),

	.psc_init		= &da830_psc0_init,

};



LPSC_CLKDEV3(usb0_clkdev,	"fck",	"da830-usb-phy-clks",

				NULL,	"musb-da8xx",

				NULL,	"cppi41-dmaengine");

LPSC_CLKDEV1(usb1_clkdev,	NULL,	"ohci-da8xx");

/* REVISIT: gpio-davinci.c should be modified to drop con_id */

LPSC_CLKDEV1(gpio_clkdev,	"gpio",	NULL);

LPSC_CLKDEV2(emac_clkdev,	NULL,	"davinci_emac.1",

				"fck",	"davinci_mdio.0");

LPSC_CLKDEV1(mcasp0_clkdev,	NULL,	"davinci-mcasp.0");

LPSC_CLKDEV1(mcasp1_clkdev,	NULL,	"davinci-mcasp.1");

LPSC_CLKDEV1(mcasp2_clkdev,	NULL,	"davinci-mcasp.2");

LPSC_CLKDEV1(spi1_clkdev,	NULL,	"spi_davinci.1");

LPSC_CLKDEV1(i2c1_clkdev,	NULL,	"i2c_davinci.2");

LPSC_CLKDEV1(uart1_clkdev,	NULL,	"serial8250.1");

LPSC_CLKDEV1(uart2_clkdev,	NULL,	"serial8250.2");

LPSC_CLKDEV1(lcdc_clkdev,	"fck",	"da8xx_lcdc.0");

LPSC_CLKDEV2(pwm_clkdev,	"fck",	"ehrpwm.0",

				"fck",	"ehrpwm.1");

LPSC_CLKDEV3(ecap_clkdev,	"fck",	"ecap.0",

				"fck",	"ecap.1",

				"fck",	"ecap.2");

LPSC_CLKDEV2(eqep_clkdev,	NULL,	"eqep.0",

				NULL,	"eqep.1");



static const struct davinci_lpsc_clk_info da830_psc1_info[] = {

	LPSC(1,  0, usb0,   pll0_sysclk2, usb0_clkdev,   0),

	LPSC(2,  0, usb1,   pll0_sysclk4, usb1_clkdev,   0),

	LPSC(3,  0, gpio,   pll0_sysclk4, gpio_clkdev,   0),

	LPSC(5,  0, emac,   pll0_sysclk4, emac_clkdev,   0),

	LPSC(6,  0, emif3,  pll0_sysclk5, NULL,          LPSC_ALWAYS_ENABLED),

	LPSC(7,  0, mcasp0, pll0_sysclk2, mcasp0_clkdev, 0),

	LPSC(8,  0, mcasp1, pll0_sysclk2, mcasp1_clkdev, 0),

	LPSC(9,  0, mcasp2, pll0_sysclk2, mcasp2_clkdev, 0),

	LPSC(10, 0, spi1,   pll0_sysclk2, spi1_clkdev,   0),

	LPSC(11, 0, i2c1,   pll0_sysclk4, i2c1_clkdev,   0),

	LPSC(12, 0, uart1,  pll0_sysclk2, uart1_clkdev,  0),

	LPSC(13, 0, uart2,  pll0_sysclk2, uart2_clkdev,  0),

	LPSC(16, 0, lcdc,   pll0_sysclk2, lcdc_clkdev,   0),

	LPSC(17, 0, pwm,    pll0_sysclk2, pwm_clkdev,    0),

	LPSC(20, 0, ecap,   pll0_sysclk2, ecap_clkdev,   0),

	LPSC(21, 0, eqep,   pll0_sysclk2, eqep_clkdev,   0),

	{ }

};



static int da830_psc1_init(struct device *dev, void __iomem *base)

{

	return davinci_psc_register_clocks(dev, da830_psc1_info, 32, base);

}



static struct clk_bulk_data da830_psc1_parent_clks[] = {

	{ .id = "pll0_sysclk2" },

	{ .id = "pll0_sysclk4" },

	{ .id = "pll0_sysclk5" },

};



const struct davinci_psc_init_data da830_psc1_init_data = {

	.parent_clks		= da830_psc1_parent_clks,

	.num_parent_clks	= ARRAY_SIZE(da830_psc1_parent_clks),

	.psc_init		= &da830_psc1_init,

};

drivers/clk/davinci/psc.c

+0 −8
Original line number Diff line number Diff line
@@ -494,22 +494,14 @@ int of_davinci_psc_clk_init(struct device *dev, 
}



static const struct of_device_id davinci_psc_of_match[] = {

#ifdef CONFIG_ARCH_DAVINCI_DA850

	{ .compatible = "ti,da850-psc0", .data = &of_da850_psc0_init_data },

	{ .compatible = "ti,da850-psc1", .data = &of_da850_psc1_init_data },

#endif

	{ }

};



static const struct platform_device_id davinci_psc_id_table[] = {

#ifdef CONFIG_ARCH_DAVINCI_DA830

	{ .name = "da830-psc0", .driver_data = (kernel_ulong_t)&da830_psc0_init_data },

	{ .name = "da830-psc1", .driver_data = (kernel_ulong_t)&da830_psc1_init_data },

#endif

#ifdef CONFIG_ARCH_DAVINCI_DA850

	{ .name = "da850-psc0", .driver_data = (kernel_ulong_t)&da850_psc0_init_data },

	{ .name = "da850-psc1", .driver_data = (kernel_ulong_t)&da850_psc1_init_data },

#endif

	{ }

};