Loading arch/arm/boot/dts/omap4.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -108,7 +108,6 @@ mpu { dsp { compatible = "ti,omap3-c64"; ti,hwmods = "dsp"; }; iva { Loading arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h +0 −2 Original line number Diff line number Diff line Loading @@ -24,7 +24,6 @@ extern struct omap_hwmod_ocp_if am33xx_l3_s__l4_wkup; extern struct omap_hwmod_ocp_if am33xx_l3_main__l3_instr; extern struct omap_hwmod_ocp_if am33xx_mpu__prcm; extern struct omap_hwmod_ocp_if am33xx_l3_s__l3_main; extern struct omap_hwmod_ocp_if am33xx_pruss__l3_main; extern struct omap_hwmod_ocp_if am33xx_gfx__l3_main; extern struct omap_hwmod_ocp_if am33xx_l3_main__gfx; extern struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc; Loading @@ -42,7 +41,6 @@ extern struct omap_hwmod am33xx_l3_instr_hwmod; extern struct omap_hwmod am33xx_l4_ls_hwmod; extern struct omap_hwmod am33xx_l4_wkup_hwmod; extern struct omap_hwmod am33xx_mpu_hwmod; extern struct omap_hwmod am33xx_pruss_hwmod; extern struct omap_hwmod am33xx_gfx_hwmod; extern struct omap_hwmod am33xx_prcm_hwmod; extern struct omap_hwmod am33xx_ocmcram_hwmod; Loading arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +0 −8 Original line number Diff line number Diff line Loading @@ -74,14 +74,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* pru-icss -> l3 main */ struct omap_hwmod_ocp_if am33xx_pruss__l3_main = { .master = &am33xx_pruss_hwmod, .slave = &am33xx_l3_main_hwmod, .clk = "l3_gclk", .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* gfx -> l3 main */ struct omap_hwmod_ocp_if am33xx_gfx__l3_main = { .master = &am33xx_gfx_hwmod, Loading arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +0 −33 Original line number Diff line number Diff line Loading @@ -133,34 +133,6 @@ struct omap_hwmod_class am33xx_wkup_m3_hwmod_class = { .name = "wkup_m3", }; /* * 'pru-icss' class * Programmable Real-Time Unit and Industrial Communication Subsystem */ static struct omap_hwmod_class am33xx_pruss_hwmod_class = { .name = "pruss", }; static struct omap_hwmod_rst_info am33xx_pruss_resets[] = { { .name = "pruss", .rst_shift = 1 }, }; /* pru-icss */ /* Pseudo hwmod for reset control purpose only */ struct omap_hwmod am33xx_pruss_hwmod = { .name = "pruss", .class = &am33xx_pruss_hwmod_class, .clkdm_name = "pruss_ocp_clkdm", .main_clk = "pruss_ocp_gclk", .prcm = { .omap4 = { .modulemode = MODULEMODE_SWCTRL, }, }, .rst_lines = am33xx_pruss_resets, .rst_lines_cnt = ARRAY_SIZE(am33xx_pruss_resets), }; /* gfx */ /* Pseudo hwmod for reset control purpose only */ static struct omap_hwmod_class am33xx_gfx_hwmod_class = { Loading Loading @@ -486,7 +458,6 @@ static void omap_hwmod_am33xx_clkctrl(void) CLKCTRL(am33xx_tptc1_hwmod, AM33XX_CM_PER_TPTC1_CLKCTRL_OFFSET); CLKCTRL(am33xx_tptc2_hwmod, AM33XX_CM_PER_TPTC2_CLKCTRL_OFFSET); CLKCTRL(am33xx_gfx_hwmod, AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET); CLKCTRL(am33xx_pruss_hwmod, AM33XX_CM_PER_PRUSS_CLKCTRL_OFFSET); CLKCTRL(am33xx_mpu_hwmod , AM33XX_CM_MPU_MPU_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_instr_hwmod , AM33XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET); CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); Loading @@ -494,7 +465,6 @@ static void omap_hwmod_am33xx_clkctrl(void) static void omap_hwmod_am33xx_rst(void) { RSTCTRL(am33xx_pruss_hwmod, AM33XX_RM_PER_RSTCTRL_OFFSET); RSTCTRL(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTCTRL_OFFSET); RSTST(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTST_OFFSET); } Loading Loading @@ -523,7 +493,6 @@ static void omap_hwmod_am43xx_clkctrl(void) CLKCTRL(am33xx_tptc1_hwmod, AM43XX_CM_PER_TPTC1_CLKCTRL_OFFSET); CLKCTRL(am33xx_tptc2_hwmod, AM43XX_CM_PER_TPTC2_CLKCTRL_OFFSET); CLKCTRL(am33xx_gfx_hwmod, AM43XX_CM_GFX_GFX_CLKCTRL_OFFSET); CLKCTRL(am33xx_pruss_hwmod, AM43XX_CM_PER_PRUSS_CLKCTRL_OFFSET); CLKCTRL(am33xx_mpu_hwmod , AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_instr_hwmod , AM43XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET); CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); Loading @@ -531,9 +500,7 @@ static void omap_hwmod_am43xx_clkctrl(void) static void omap_hwmod_am43xx_rst(void) { RSTCTRL(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTCTRL_OFFSET); RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET); RSTST(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTST_OFFSET); RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET); } Loading arch/arm/mach-omap2/omap_hwmod_33xx_data.c +0 −10 Original line number Diff line number Diff line Loading @@ -233,14 +233,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__wkup_m3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 hs -> pru-icss */ static struct omap_hwmod_ocp_if am33xx_l4_hs__pruss = { .master = &am33xx_l4_hs_hwmod, .slave = &am33xx_pruss_hwmod, .clk = "dpll_core_m4_ck", .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l3_main -> debugss */ static struct omap_hwmod_ocp_if am33xx_l3_main__debugss = { .master = &am33xx_l3_main_hwmod, Loading Loading @@ -292,7 +284,6 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_main__l3_instr, &am33xx_l3_main__gfx, &am33xx_l3_s__l3_main, &am33xx_pruss__l3_main, &am33xx_wkup_m3__l4_wkup, &am33xx_gfx__l3_main, &am33xx_l3_main__debugss, Loading @@ -302,7 +293,6 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_wkup__smartreflex1, &am33xx_l4_wkup__timer1, &am33xx_l4_wkup__rtc, &am33xx_l4_hs__pruss, &am33xx_l4_ls__timer2, &am33xx_l3_main__tpcc, &am33xx_l3_s__gpmc, Loading Loading
arch/arm/boot/dts/omap4.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -108,7 +108,6 @@ mpu { dsp { compatible = "ti,omap3-c64"; ti,hwmods = "dsp"; }; iva { Loading
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h +0 −2 Original line number Diff line number Diff line Loading @@ -24,7 +24,6 @@ extern struct omap_hwmod_ocp_if am33xx_l3_s__l4_wkup; extern struct omap_hwmod_ocp_if am33xx_l3_main__l3_instr; extern struct omap_hwmod_ocp_if am33xx_mpu__prcm; extern struct omap_hwmod_ocp_if am33xx_l3_s__l3_main; extern struct omap_hwmod_ocp_if am33xx_pruss__l3_main; extern struct omap_hwmod_ocp_if am33xx_gfx__l3_main; extern struct omap_hwmod_ocp_if am33xx_l3_main__gfx; extern struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc; Loading @@ -42,7 +41,6 @@ extern struct omap_hwmod am33xx_l3_instr_hwmod; extern struct omap_hwmod am33xx_l4_ls_hwmod; extern struct omap_hwmod am33xx_l4_wkup_hwmod; extern struct omap_hwmod am33xx_mpu_hwmod; extern struct omap_hwmod am33xx_pruss_hwmod; extern struct omap_hwmod am33xx_gfx_hwmod; extern struct omap_hwmod am33xx_prcm_hwmod; extern struct omap_hwmod am33xx_ocmcram_hwmod; Loading
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +0 −8 Original line number Diff line number Diff line Loading @@ -74,14 +74,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* pru-icss -> l3 main */ struct omap_hwmod_ocp_if am33xx_pruss__l3_main = { .master = &am33xx_pruss_hwmod, .slave = &am33xx_l3_main_hwmod, .clk = "l3_gclk", .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* gfx -> l3 main */ struct omap_hwmod_ocp_if am33xx_gfx__l3_main = { .master = &am33xx_gfx_hwmod, Loading
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +0 −33 Original line number Diff line number Diff line Loading @@ -133,34 +133,6 @@ struct omap_hwmod_class am33xx_wkup_m3_hwmod_class = { .name = "wkup_m3", }; /* * 'pru-icss' class * Programmable Real-Time Unit and Industrial Communication Subsystem */ static struct omap_hwmod_class am33xx_pruss_hwmod_class = { .name = "pruss", }; static struct omap_hwmod_rst_info am33xx_pruss_resets[] = { { .name = "pruss", .rst_shift = 1 }, }; /* pru-icss */ /* Pseudo hwmod for reset control purpose only */ struct omap_hwmod am33xx_pruss_hwmod = { .name = "pruss", .class = &am33xx_pruss_hwmod_class, .clkdm_name = "pruss_ocp_clkdm", .main_clk = "pruss_ocp_gclk", .prcm = { .omap4 = { .modulemode = MODULEMODE_SWCTRL, }, }, .rst_lines = am33xx_pruss_resets, .rst_lines_cnt = ARRAY_SIZE(am33xx_pruss_resets), }; /* gfx */ /* Pseudo hwmod for reset control purpose only */ static struct omap_hwmod_class am33xx_gfx_hwmod_class = { Loading Loading @@ -486,7 +458,6 @@ static void omap_hwmod_am33xx_clkctrl(void) CLKCTRL(am33xx_tptc1_hwmod, AM33XX_CM_PER_TPTC1_CLKCTRL_OFFSET); CLKCTRL(am33xx_tptc2_hwmod, AM33XX_CM_PER_TPTC2_CLKCTRL_OFFSET); CLKCTRL(am33xx_gfx_hwmod, AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET); CLKCTRL(am33xx_pruss_hwmod, AM33XX_CM_PER_PRUSS_CLKCTRL_OFFSET); CLKCTRL(am33xx_mpu_hwmod , AM33XX_CM_MPU_MPU_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_instr_hwmod , AM33XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET); CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); Loading @@ -494,7 +465,6 @@ static void omap_hwmod_am33xx_clkctrl(void) static void omap_hwmod_am33xx_rst(void) { RSTCTRL(am33xx_pruss_hwmod, AM33XX_RM_PER_RSTCTRL_OFFSET); RSTCTRL(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTCTRL_OFFSET); RSTST(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTST_OFFSET); } Loading Loading @@ -523,7 +493,6 @@ static void omap_hwmod_am43xx_clkctrl(void) CLKCTRL(am33xx_tptc1_hwmod, AM43XX_CM_PER_TPTC1_CLKCTRL_OFFSET); CLKCTRL(am33xx_tptc2_hwmod, AM43XX_CM_PER_TPTC2_CLKCTRL_OFFSET); CLKCTRL(am33xx_gfx_hwmod, AM43XX_CM_GFX_GFX_CLKCTRL_OFFSET); CLKCTRL(am33xx_pruss_hwmod, AM43XX_CM_PER_PRUSS_CLKCTRL_OFFSET); CLKCTRL(am33xx_mpu_hwmod , AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_instr_hwmod , AM43XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET); CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); Loading @@ -531,9 +500,7 @@ static void omap_hwmod_am43xx_clkctrl(void) static void omap_hwmod_am43xx_rst(void) { RSTCTRL(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTCTRL_OFFSET); RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET); RSTST(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTST_OFFSET); RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET); } Loading
arch/arm/mach-omap2/omap_hwmod_33xx_data.c +0 −10 Original line number Diff line number Diff line Loading @@ -233,14 +233,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__wkup_m3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 hs -> pru-icss */ static struct omap_hwmod_ocp_if am33xx_l4_hs__pruss = { .master = &am33xx_l4_hs_hwmod, .slave = &am33xx_pruss_hwmod, .clk = "dpll_core_m4_ck", .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l3_main -> debugss */ static struct omap_hwmod_ocp_if am33xx_l3_main__debugss = { .master = &am33xx_l3_main_hwmod, Loading Loading @@ -292,7 +284,6 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_main__l3_instr, &am33xx_l3_main__gfx, &am33xx_l3_s__l3_main, &am33xx_pruss__l3_main, &am33xx_wkup_m3__l4_wkup, &am33xx_gfx__l3_main, &am33xx_l3_main__debugss, Loading @@ -302,7 +293,6 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_wkup__smartreflex1, &am33xx_l4_wkup__timer1, &am33xx_l4_wkup__rtc, &am33xx_l4_hs__pruss, &am33xx_l4_ls__timer2, &am33xx_l3_main__tpcc, &am33xx_l3_s__gpmc, Loading