Unverified Commit a5697269 authored by Mayuresh Chitale's avatar Mayuresh Chitale Committed by Palmer Dabbelt
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riscv: mm: Add support for Svinval extension 



The Svinval extension splits SFENCE.VMA instruction into finer-grained
invalidation and ordering operations and is mandatory for RVA23S64 profile.
When Svinval is enabled the local_flush_tlb_range_threshold_asid function
should use the following sequence to optimize the tlb flushes instead of
a simple sfence.vma:

sfence.w.inval
svinval.vma
  .
  .
svinval.vma
sfence.inval.ir

The maximum number of consecutive svinval.vma instructions that
can be executed in local_flush_tlb_range_threshold_asid function
is limited to 64. This is required to avoid soft lockups and the
approach is similar to that used in arm64.

Signed-off-by: default avatarMayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20240702102637.9074-1-mchitale@ventanamicro.com


Signed-off-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: default avatarPalmer Dabbelt <palmer@dabbelt.com>
parent 82f2b0b9

arch/riscv/mm/tlbflush.c

+31 −0
Original line number Diff line number Diff line
@@ -7,6 +7,27 @@ 
#include <linux/mmu_notifier.h>

#include <asm/sbi.h>

#include <asm/mmu_context.h>

#include <asm/cpufeature.h>



#define has_svinval()	riscv_has_extension_unlikely(RISCV_ISA_EXT_SVINVAL)



static inline void local_sfence_inval_ir(void)

{

	asm volatile(SFENCE_INVAL_IR() ::: "memory");

}



static inline void local_sfence_w_inval(void)

{

	asm volatile(SFENCE_W_INVAL() ::: "memory");

}



static inline void local_sinval_vma(unsigned long vma, unsigned long asid)

{

	if (asid != FLUSH_TLB_NO_ASID)

		asm volatile(SINVAL_VMA(%0, %1) : : "r" (vma), "r" (asid) : "memory");

	else

		asm volatile(SINVAL_VMA(%0, zero) : : "r" (vma) : "memory");

}



/*

 * Flush entire TLB if number of entries to be flushed is greater
@@ -27,6 +48,16 @@ static void local_flush_tlb_range_threshold_asid(unsigned long start, 
		return;

	}



	if (has_svinval()) {

		local_sfence_w_inval();

		for (i = 0; i < nr_ptes_in_range; ++i) {

			local_sinval_vma(start, asid);

			start += stride;

		}

		local_sfence_inval_ir();

		return;

	}



	for (i = 0; i < nr_ptes_in_range; ++i) {

		local_flush_tlb_page_asid(start, asid);

		start += stride;