Commit a6ae7129 authored by Geetha sowjanya's avatar Geetha sowjanya Committed by Paolo Abeni
Browse files

octeontx2-af: Fix APR entry mapping based on APR_LMT_CFG 



The current implementation maps the APR table using a fixed size,
which can lead to incorrect mapping when the number of PFs and VFs
varies.
This patch corrects the mapping by calculating the APR table
size dynamically based on the values configured in the
APR_LMT_CFG register, ensuring accurate representation
of APR entries in debugfs.

Fixes: 0daa55d0 ("octeontx2-af: cn10k: debugfs for dumping LMTST map table").
Signed-off-by: default avatarGeetha sowjanya <gakula@marvell.com>
Link: https://patch.msgid.link/20250521060834.19780-3-gakula@marvell.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 0eefa27b

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

+6 −3
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@ 
/* RVU LMTST */

#define LMT_TBL_OP_READ		0

#define LMT_TBL_OP_WRITE	1

#define LMT_MAP_TABLE_SIZE	(128 * 1024)

#define LMT_MAPTBL_ENTRY_SIZE	16

#define LMT_MAX_VFS		256
@@ -26,10 +25,14 @@ static int lmtst_map_table_ops(struct rvu *rvu, u32 index, u64 *val, 
{

	void __iomem *lmt_map_base;

	u64 tbl_base, cfg;

	int pfs, vfs;



	tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);

	cfg  = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);

	vfs = 1 << (cfg & 0xF);

	pfs = 1 << ((cfg >> 4) & 0x7);



	lmt_map_base = ioremap_wc(tbl_base, LMT_MAP_TABLE_SIZE);

	lmt_map_base = ioremap_wc(tbl_base, pfs * vfs * LMT_MAPTBL_ENTRY_SIZE);

	if (!lmt_map_base) {

		dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n");

		return -ENOMEM;
@@ -80,7 +83,7 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, 


	mutex_lock(&rvu->rsrc_lock);

	rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova);

	pf = rvu_get_pf(pcifunc) & 0x1F;

	pf = rvu_get_pf(pcifunc) & RVU_PFVF_PF_MASK;

	val = BIT_ULL(63) | BIT_ULL(14) | BIT_ULL(13) | pf << 8 |

	      ((pcifunc & RVU_PFVF_FUNC_MASK) & 0xFF);

	rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TXN_REQ, val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

+8 −3
Original line number Diff line number Diff line
@@ -553,6 +553,7 @@ static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp, 
	u64 lmt_addr, val, tbl_base;

	int pf, vf, num_vfs, hw_vfs;

	void __iomem *lmt_map_base;

	int apr_pfs, apr_vfs;

	int buf_size = 10240;

	size_t off = 0;

	int index = 0;
@@ -568,8 +569,12 @@ static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp, 
		return -ENOMEM;



	tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);

	val  = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);

	apr_vfs = 1 << (val & 0xF);

	apr_pfs = 1 << ((val >> 4) & 0x7);



	lmt_map_base = ioremap_wc(tbl_base, 128 * 1024);

	lmt_map_base = ioremap_wc(tbl_base, apr_pfs * apr_vfs *

				  LMT_MAPTBL_ENTRY_SIZE);

	if (!lmt_map_base) {

		dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n");

		kfree(buf);
@@ -591,7 +596,7 @@ static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp, 
		off += scnprintf(&buf[off], buf_size - 1 - off, "PF%d  \t\t\t",

				    pf);



		index = pf * rvu->hw->total_vfs * LMT_MAPTBL_ENTRY_SIZE;

		index = pf * apr_vfs * LMT_MAPTBL_ENTRY_SIZE;

		off += scnprintf(&buf[off], buf_size - 1 - off, " 0x%llx\t\t",

				 (tbl_base + index));

		lmt_addr = readq(lmt_map_base + index);
@@ -604,7 +609,7 @@ static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp, 
		/* Reading num of VFs per PF */

		rvu_get_pf_numvfs(rvu, pf, &num_vfs, &hw_vfs);

		for (vf = 0; vf < num_vfs; vf++) {

			index = (pf * rvu->hw->total_vfs * 16) +

			index = (pf * apr_vfs * LMT_MAPTBL_ENTRY_SIZE) +

				((vf + 1)  * LMT_MAPTBL_ENTRY_SIZE);

			off += scnprintf(&buf[off], buf_size - 1 - off,

					    "PF%d:VF%d  \t\t", pf, vf);