Commit a7479860 authored by Yassine Oudjana's avatar Yassine Oudjana Committed by Stephen Boyd
Browse files

dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers 



Add device tree bindings for syscon clock and reset controllers (IMGSYS,
MFGCFG, VDECSYS and VENCSYS).

Signed-off-by: default avatarYassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20241106111402.200940-2-y.oudjana@protonmail.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent be530c3f

Documentation/devicetree/bindings/clock/mediatek,syscon.yaml

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@@ -28,6 +28,10 @@ properties: 
              - mediatek,mt2712-mfgcfg

              - mediatek,mt2712-vdecsys

              - mediatek,mt2712-vencsys

              - mediatek,mt6735-imgsys

              - mediatek,mt6735-mfgcfg

              - mediatek,mt6735-vdecsys

              - mediatek,mt6735-vencsys

              - mediatek,mt6765-camsys

              - mediatek,mt6765-imgsys

              - mediatek,mt6765-mipi0a

MAINTAINERS

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@@ -14538,11 +14538,17 @@ F: drivers/clk/mediatek/clk-mt6735-infracfg.c 
F:	drivers/clk/mediatek/clk-mt6735-pericfg.c

F:	drivers/clk/mediatek/clk-mt6735-topckgen.c

F:	include/dt-bindings/clock/mediatek,mt6735-apmixedsys.h

F:	include/dt-bindings/clock/mediatek,mt6735-imgsys.h

F:	include/dt-bindings/clock/mediatek,mt6735-infracfg.h

F:	include/dt-bindings/clock/mediatek,mt6735-mfgcfg.h

F:	include/dt-bindings/clock/mediatek,mt6735-pericfg.h

F:	include/dt-bindings/clock/mediatek,mt6735-topckgen.h

F:	include/dt-bindings/clock/mediatek,mt6735-vdecsys.h

F:	include/dt-bindings/clock/mediatek,mt6735-vencsys.h

F:	include/dt-bindings/reset/mediatek,mt6735-infracfg.h

F:	include/dt-bindings/reset/mediatek,mt6735-mfgcfg.h

F:	include/dt-bindings/reset/mediatek,mt6735-pericfg.h

F:	include/dt-bindings/reset/mediatek,mt6735-vdecsys.h









MEDIATEK MT76 WIRELESS LAN DRIVER









M:	Felix Fietkau <nbd@nbd.name>
































include/dt-bindings/clock/mediatek,mt6735-imgsys.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */



















#ifndef _DT_BINDINGS_CLK_MT6735_IMGSYS_H









#define _DT_BINDINGS_CLK_MT6735_IMGSYS_H



















#define CLK_IMG_SMI_LARB2		0









#define CLK_IMG_CAM_SMI			1









#define CLK_IMG_CAM_CAM			2









#define CLK_IMG_SEN_TG			3









#define CLK_IMG_SEN_CAM			4









#define CLK_IMG_CAM_SV			5









#define CLK_IMG_SUFOD			6









#define CLK_IMG_FD			7



















#endif /* _DT_BINDINGS_CLK_MT6735_IMGSYS_H */
























include/dt-bindings/clock/mediatek,mt6735-mfgcfg.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */



















#ifndef _DT_BINDINGS_CLK_MT6735_MFGCFG_H









#define _DT_BINDINGS_CLK_MT6735_MFGCFG_H



















#define CLK_MFG_BG3D			0



















#endif /* _DT_BINDINGS_CLK_MT6735_MFGCFG_H */
























include/dt-bindings/clock/mediatek,mt6735-vdecsys.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */



















#ifndef _DT_BINDINGS_CLK_MT6735_VDECSYS_H









#define _DT_BINDINGS_CLK_MT6735_VDECSYS_H



















#define CLK_VDEC_VDEC			0









#define CLK_VDEC_SMI_LARB1		1



















#endif /* _DT_BINDINGS_CLK_MT6735_VDECSYS_H */