Commit a820a285 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Bjorn Andersson
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arm64: dts: qcom: sm6115: Fix UFS PHY clocks 



QMP PHY used in SM6115 requires 3 clocks:

* ref - 19.2MHz reference clock from RPM
* ref_aux - Auxiliary reference clock from GCC
* qref - QREF clock from GCC

Fixes: 97e563bf ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-8-58a49d2f4605@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent ca8fb2bd

arch/arm64/boot/dts/qcom/sm6115.dtsi

+6 −2
Original line number Diff line number Diff line
@@ -1202,8 +1202,12 @@ ufs_mem_phy: phy@4807000 { 
			compatible = "qcom,sm6115-qmp-ufs-phy";

			reg = <0x0 0x04807000 0x0 0x1000>;



			clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;

			clock-names = "ref", "ref_aux";

			clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,

				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,

				 <&gcc GCC_UFS_CLKREF_CLK>;

			clock-names = "ref",

				      "ref_aux",

				      "qref";



			resets = <&ufs_mem_hc 0>;

			reset-names = "ufsphy";