Commit a822bdb2 authored by Marc Kleine-Budde's avatar Marc Kleine-Budde Committed by Jakub Kicinski
Browse files

net: fec: fix typos found by codespell 



codespell has found some typos in the comments, fix them.

Reviewed-by: default avatarWei Fang <wei.fang@nxp.com>
Reviewed-by: default avatarFrank Li <Frank.Li@nxp.com>
Reviewed-by: default avatarCsókás, Bence <csokas.bence@prolan.hu>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
Link: https://patch.msgid.link/20250618-fec-cleanups-v4-1-c16f9a1af124@pengutronix.de


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 9ce3f34c

drivers/net/ethernet/freescale/fec.h

+4 −4
Original line number Diff line number Diff line
@@ -115,7 +115,7 @@ 
#define IEEE_T_MCOL		0x254 /* Frames tx'd with multiple collision */

#define IEEE_T_DEF		0x258 /* Frames tx'd after deferral delay */

#define IEEE_T_LCOL		0x25c /* Frames tx'd with late collision */

#define IEEE_T_EXCOL		0x260 /* Frames tx'd with excesv collisions */

#define IEEE_T_EXCOL		0x260 /* Frames tx'd with excessive collisions */

#define IEEE_T_MACERR		0x264 /* Frames tx'd with TX FIFO underrun */

#define IEEE_T_CSERR		0x268 /* Frames tx'd with carrier sense err */

#define IEEE_T_SQE		0x26c /* Frames tx'd with SQE err */
@@ -342,7 +342,7 @@ struct bufdesc_ex { 
#define FEC_TX_BD_FTYPE(X)	(((X) & 0xf) << 20)



/* The number of Tx and Rx buffers.  These are allocated from the page

 * pool.  The code may assume these are power of two, so it it best

 * pool.  The code may assume these are power of two, so it is best

 * to keep them that size.

 * We don't need to allocate pages for the transmitter.  We just use

 * the skbuffer directly.
@@ -460,7 +460,7 @@ struct bufdesc_ex { 
#define FEC_QUIRK_SINGLE_MDIO		(1 << 11)

/* Controller supports RACC register */

#define FEC_QUIRK_HAS_RACC		(1 << 12)

/* Controller supports interrupt coalesc */

/* Controller supports interrupt coalesce */

#define FEC_QUIRK_HAS_COALESCE		(1 << 13)

/* Interrupt doesn't wake CPU from deep idle */

#define FEC_QUIRK_ERR006687		(1 << 14)
@@ -495,7 +495,7 @@ struct bufdesc_ex { 
 */

#define FEC_QUIRK_HAS_EEE		(1 << 20)



/* i.MX8QM ENET IP version add new feture to generate delayed TXC/RXC

/* i.MX8QM ENET IP version add new feature to generate delayed TXC/RXC

 * as an alternative option to make sure it works well with various PHYs.

 * For the implementation of delayed clock, ENET takes synchronized 250MHz

 * clocks to generate 2ns delay.

drivers/net/ethernet/freescale/fec_mpc52xx.c

+1 −1
Original line number Diff line number Diff line
@@ -619,7 +619,7 @@ static void mpc52xx_fec_hw_init(struct net_device *dev) 
	out_be32(&fec->rfifo_alarm, 0x0000030c);

	out_be32(&fec->tfifo_alarm, 0x00000100);



	/* begin transmittion when 256 bytes are in FIFO (or EOF or FIFO full) */

	/* begin transmission when 256 bytes are in FIFO (or EOF or FIFO full) */

	out_be32(&fec->x_wmrk, FEC_FIFO_WMRK_256B);



	/* enable crc generation */

drivers/net/ethernet/freescale/fec_ptp.c

+2 −2
Original line number Diff line number Diff line
@@ -117,7 +117,7 @@ static u64 fec_ptp_read(const struct cyclecounter *cc) 
 * @fep: the fec_enet_private structure handle

 * @enable: enable the channel pps output

 *

 * This function enble the PPS ouput on the timer channel.

 * This function enables the PPS output on the timer channel.

 */

static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)

{
@@ -172,7 +172,7 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable) 
		 * very close to the second point, which means NSEC_PER_SEC

		 * - ts.tv_nsec is close to be zero(For example 20ns); Since the timer

		 * is still running when we calculate the first compare event, it is

		 * possible that the remaining nanoseonds run out before the compare

		 * possible that the remaining nanoseconds run out before the compare

		 * counter is calculated and written into TCCR register. To avoid

		 * this possibility, we will set the compare event to be the next

		 * of next second. The current setting is 31-bit timer and wrap