Commit a8e0c7a6 authored by Jesse Brandeburg's avatar Jesse Brandeburg Committed by Tony Nguyen
Browse files

igc: field get conversion



Refactor the igc driver to use FIELD_GET() for mask and shift reads,
which reduces lines of code and adds clarity of intent.

This code was generated by the following coccinelle/spatch script and
then manually repaired in a later patch.

@get@
constant shift,mask;
type T;
expression a;
@@
-((T)((a) & mask) >> shift)
+FIELD_GET(mask, a)

and applied via:
spatch --sp-file field_prep.cocci --in-place --dir \
 drivers/net/ethernet/intel/

Cc: Julia Lawall <Julia.Lawall@inria.fr>
Reviewed-by: default avatarMarcin Szycik <marcin.szycik@linux.intel.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent b9a45254
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+2 −4
Original line number Diff line number Diff line
@@ -68,8 +68,7 @@ static s32 igc_init_nvm_params_base(struct igc_hw *hw)
	u32 eecd = rd32(IGC_EECD);
	u16 size;

	size = (u16)((eecd & IGC_EECD_SIZE_EX_MASK) >>
		     IGC_EECD_SIZE_EX_SHIFT);
	size = FIELD_GET(IGC_EECD_SIZE_EX_MASK, eecd);

	/* Added to a constant, "size" becomes the left-shift value
	 * for setting word_size.
@@ -162,8 +161,7 @@ static s32 igc_init_phy_params_base(struct igc_hw *hw)
	phy->reset_delay_us	= 100;

	/* set lan id */
	hw->bus.func = (rd32(IGC_STATUS) & IGC_STATUS_FUNC_MASK) >>
			IGC_STATUS_FUNC_SHIFT;
	hw->bus.func = FIELD_GET(IGC_STATUS_FUNC_MASK, rd32(IGC_STATUS));

	/* Make sure the PHY is in a good state. Several people have reported
	 * firmware leaving the PHY's page select register set to something
+2 −3
Original line number Diff line number Diff line
@@ -579,9 +579,8 @@ s32 igc_set_ltr_i225(struct igc_hw *hw, bool link)

			/* Calculate tw_system (nsec). */
			if (speed == SPEED_100) {
				tw_system = ((rd32(IGC_EEE_SU) &
					     IGC_TW_SYSTEM_100_MASK) >>
					     IGC_TW_SYSTEM_100_SHIFT) * 500;
				tw_system = FIELD_GET(IGC_TW_SYSTEM_100_MASK,
						      rd32(IGC_EEE_SU)) * 500;
			} else {
				tw_system = (rd32(IGC_EEE_SU) &
					     IGC_TW_SYSTEM_1000_MASK) * 500;
+2 −4
Original line number Diff line number Diff line
@@ -3712,8 +3712,7 @@ static int igc_enable_nfc_rule(struct igc_adapter *adapter,
	}

	if (rule->filter.match_flags & IGC_FILTER_FLAG_VLAN_TCI) {
		int prio = (rule->filter.vlan_tci & VLAN_PRIO_MASK) >>
			   VLAN_PRIO_SHIFT;
		int prio = FIELD_GET(VLAN_PRIO_MASK, rule->filter.vlan_tci);

		err = igc_add_vlan_prio_filter(adapter, prio, rule->action);
		if (err)
@@ -3735,8 +3734,7 @@ static void igc_disable_nfc_rule(struct igc_adapter *adapter,
		igc_del_etype_filter(adapter, rule->filter.etype);

	if (rule->filter.match_flags & IGC_FILTER_FLAG_VLAN_TCI) {
		int prio = (rule->filter.vlan_tci & VLAN_PRIO_MASK) >>
			   VLAN_PRIO_SHIFT;
		int prio = FIELD_GET(VLAN_PRIO_MASK, rule->filter.vlan_tci);

		igc_del_vlan_prio_filter(adapter, prio);
	}
+2 −2
Original line number Diff line number Diff line
@@ -727,7 +727,7 @@ static s32 igc_write_xmdio_reg(struct igc_hw *hw, u16 addr,
 */
s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data)
{
	u8 dev_addr = (offset & GPY_MMD_MASK) >> GPY_MMD_SHIFT;
	u8 dev_addr = FIELD_GET(GPY_MMD_MASK, offset);
	s32 ret_val;

	offset = offset & GPY_REG_MASK;
@@ -758,7 +758,7 @@ s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data)
 */
s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data)
{
	u8 dev_addr = (offset & GPY_MMD_MASK) >> GPY_MMD_SHIFT;
	u8 dev_addr = FIELD_GET(GPY_MMD_MASK, offset);
	s32 ret_val;

	offset = offset & GPY_REG_MASK;