Commit a9062ece authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.16-2025-06-05' of... 

Merge tag 'amd-drm-fixes-6.16-2025-06-05' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-next

amd-drm-fixes-6.16-2025-06-05:

amdgpu:
- IP discovery fix
- Cleaner shader fix for GC 10.1.x
- OD fix
- UserQ fixes
- Non-OLED panel fix
- Misc display fixes
- Brightness fixes

amdkfd:
- Enable CONFIG_HSA_AMD on RISCV

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20250606015932.835829-1-alexander.deucher@amd.com
parents 4f577bed 8b5f3a22

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+13 −3
Original line number Diff line number Diff line
@@ -270,9 +270,10 @@ static int amdgpu_discovery_read_binary_from_sysmem(struct amdgpu_device *adev, 
static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,

						 uint8_t *binary)

{

	bool sz_valid = true;

	uint64_t vram_size;

	u32 msg;

	int i, ret = 0;

	u32 msg;



	if (!amdgpu_sriov_vf(adev)) {

		/* It can take up to a second for IFWI init to complete on some dGPUs,
@@ -291,9 +292,13 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev, 
		}

	}



	vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;

	vram_size = RREG32(mmRCC_CONFIG_MEMSIZE);

	if (!vram_size || vram_size == U32_MAX)

		sz_valid = false;

	else

		vram_size <<= 20;



	if (vram_size) {

	if (sz_valid) {

		uint64_t pos = vram_size - DISCOVERY_TMR_OFFSET;

		amdgpu_device_vram_access(adev, pos, (uint32_t *)binary,

					  adev->mman.discovery_tmr_size, false);
@@ -301,6 +306,11 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev, 
		ret = amdgpu_discovery_read_binary_from_sysmem(adev, binary);

	}



	if (ret)

		dev_err(adev->dev,

			"failed to read discovery info from memory, vram size read: %llx",

			vram_size);



	return ret;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

+1 −1
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ amdgpu_gem_add_input_fence(struct drm_file *filp, 
		return 0;



	syncobj_handles = memdup_user(u64_to_user_ptr(syncobj_handles_array),

				      sizeof(uint32_t) * num_syncobj_handles);

				      size_mul(sizeof(uint32_t), num_syncobj_handles));

	if (IS_ERR(syncobj_handles))

		return PTR_ERR(syncobj_handles);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+8 −0
Original line number Diff line number Diff line
@@ -2228,6 +2228,9 @@ void amdgpu_gfx_profile_ring_begin_use(struct amdgpu_ring *ring) 
	enum PP_SMC_POWER_PROFILE profile;

	int r;



	if (amdgpu_dpm_is_overdrive_enabled(adev))

		return;



	if (adev->gfx.num_gfx_rings)

		profile = PP_SMC_POWER_PROFILE_FULLSCREEN3D;

	else
@@ -2258,6 +2261,11 @@ void amdgpu_gfx_profile_ring_begin_use(struct amdgpu_ring *ring) 


void amdgpu_gfx_profile_ring_end_use(struct amdgpu_ring *ring)

{

	struct amdgpu_device *adev = ring->adev;



	if (amdgpu_dpm_is_overdrive_enabled(adev))

		return;



	atomic_dec(&ring->adev->gfx.total_submission_cnt);



	schedule_delayed_work(&ring->adev->gfx.idle_work, GFX_PROFILE_IDLE_TIMEOUT);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

+4 −4
Original line number Diff line number Diff line
@@ -430,7 +430,7 @@ int amdgpu_userq_signal_ioctl(struct drm_device *dev, void *data, 


	num_syncobj_handles = args->num_syncobj_handles;

	syncobj_handles = memdup_user(u64_to_user_ptr(args->syncobj_handles),

				      sizeof(u32) * num_syncobj_handles);

				      size_mul(sizeof(u32), num_syncobj_handles));

	if (IS_ERR(syncobj_handles))

		return PTR_ERR(syncobj_handles);
@@ -612,13 +612,13 @@ int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data, 


	num_read_bo_handles = wait_info->num_bo_read_handles;

	bo_handles_read = memdup_user(u64_to_user_ptr(wait_info->bo_read_handles),

				      sizeof(u32) * num_read_bo_handles);

				      size_mul(sizeof(u32), num_read_bo_handles));

	if (IS_ERR(bo_handles_read))

		return PTR_ERR(bo_handles_read);



	num_write_bo_handles = wait_info->num_bo_write_handles;

	bo_handles_write = memdup_user(u64_to_user_ptr(wait_info->bo_write_handles),

				       sizeof(u32) * num_write_bo_handles);

				       size_mul(sizeof(u32), num_write_bo_handles));

	if (IS_ERR(bo_handles_write)) {

		r = PTR_ERR(bo_handles_write);

		goto free_bo_handles_read;
@@ -626,7 +626,7 @@ int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data, 


	num_syncobj = wait_info->num_syncobj_handles;

	syncobj_handles = memdup_user(u64_to_user_ptr(wait_info->syncobj_handles),

				      sizeof(u32) * num_syncobj);

				      size_mul(sizeof(u32), num_syncobj));

	if (IS_ERR(syncobj_handles)) {

		r = PTR_ERR(syncobj_handles);

		goto free_bo_handles_write;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0_cleaner_shader.h

+3 −3
Original line number Diff line number Diff line
@@ -43,9 +43,9 @@ static const u32 gfx_10_1_10_cleaner_shader_hex[] = { 
	0xd70f6a01, 0x000202ff,

	0x00000400, 0x80828102,

	0xbf84fff7, 0xbefc03ff,

	0x00000068, 0xbe803080,

	0xbe813080, 0xbe823080,

	0xbe833080, 0x80fc847c,

	0x00000068, 0xbe803000,

	0xbe813000, 0xbe823000,

	0xbe833000, 0x80fc847c,

	0xbf84fffa, 0xbeea0480,

	0xbeec0480, 0xbeee0480,

	0xbef00480, 0xbef20480,