Commit a9e483dd authored by Matthew Brost's avatar Matthew Brost
Browse files

drm/xe: Don't support execlists in xe_gt_tlb_invalidation layer 



The xe_gt_tlb_invalidation layer implements TLB invalidations for a GuC
backend. Simply return if in execlists mode. A follow up may properly
implement the xe_gt_tlb_invalidation layer for both GuC and execlists.

Fixes: a9351846 ("drm/xe: Break of TLB invalidation into its own file")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240222232021.3911545-4-matthew.brost@intel.com
parent 3121fed0

drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c

+12 −0
Original line number Diff line number Diff line
@@ -287,6 +287,14 @@ int xe_gt_tlb_invalidation_vma(struct xe_gt *gt, 


	xe_gt_assert(gt, vma);



	/* Execlists not supported */

	if (gt_to_xe(gt)->info.force_execlist) {

		if (fence)

			__invalidation_fence_signal(fence);



		return 0;

	}



	action[len++] = XE_GUC_ACTION_TLB_INVALIDATION;

	action[len++] = 0; /* seqno, replaced in send_tlb_invalidation */

	if (!xe->info.has_range_tlb_invalidation) {
@@ -355,6 +363,10 @@ int xe_gt_tlb_invalidation_wait(struct xe_gt *gt, int seqno) 
	struct xe_guc *guc = &gt->uc.guc;

	int ret;



	/* Execlists not supported */

	if (gt_to_xe(gt)->info.force_execlist)

		return 0;



	/*

	 * XXX: See above, this algorithm only works if seqno are always in

	 * order