Unverified Commit aabd8ea0 authored Jan 26, 2026 by Breno Leitao Committed by Mark Brown Jan 30, 2026

spi: tegra210-quad: Return IRQ_HANDLED when timeout already processed transfer



When the ISR thread wakes up late and finds that the timeout handler
has already processed the transfer (curr_xfer is NULL), return
IRQ_HANDLED instead of IRQ_NONE.

Use a similar approach to tegra_qspi_handle_timeout() by reading
QSPI_TRANS_STATUS and checking the QSPI_RDY bit to determine if the
hardware actually completed the transfer. If QSPI_RDY is set, the
interrupt was legitimate and triggered by real hardware activity.
The fact that the timeout path handled it first doesn't make it
spurious. Returning IRQ_NONE incorrectly suggests the interrupt
wasn't for this device, which can cause issues with shared interrupt
lines and interrupt accounting.

Fixes: b4e002d8 ("spi: tegra210-quad: Fix timeout handling")
Signed-off-by: Breno Leitao <leitao@debian.org>
Signed-off-by: Usama Arif <usamaarif642@gmail.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260126-tegra_xfer-v2-1-6d2115e4f387@debian.org


Signed-off-by: Mark Brown <broonie@kernel.org>

parent 63804fed

drivers/spi/spi-tegra210-quad.c

+17 −2

Original line number	Diff line number	Diff line
		@@ -1552,15 +1552,30 @@ static irqreturn_t handle_dma_based_xfer(struct tegra_qspi *tqspi)
		static irqreturn_t tegra_qspi_isr_thread(int irq, void *context_data)
		{
		struct tegra_qspi *tqspi = context_data;
		u32 status;

		/*
		* Read transfer status to check if interrupt was triggered by transfer
		* completion
		*/
		status = tegra_qspi_readl(tqspi, QSPI_TRANS_STATUS);

		/*
		* Occasionally the IRQ thread takes a long time to wake up (usually
		* when the CPU that it's running on is excessively busy) and we have
		* already reached the timeout before and cleaned up the timed out
		* transfer. Avoid any processing in that case and bail out early.
		*
		* If no transfer is in progress, check if this was a real interrupt
		* that the timeout handler already processed, or a spurious one.
		*/
		if (!tqspi->curr_xfer)
		if (!tqspi->curr_xfer) {
		/* Spurious interrupt - transfer not ready */
		if (!(status & QSPI_RDY))
		return IRQ_NONE;
		/* Real interrupt, already handled by timeout path */
		return IRQ_HANDLED;
		}

		tqspi->status_reg = tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS);