Commit acc4e41e authored by Nirmoy Das's avatar Nirmoy Das
Browse files

drm/xe/gt: Add APIs for printing stats over debugfs



Add skeleton APIs for recording and printing various stats over
debugfs. This currently only added counter types stats which is backed
by atomic_t and wrapped with CONFIG_DRM_XE_STATS so this can be disabled
on production system.

v4: Rebase and other minor fixes (Matt)
v3: s/CONFIG_DRM_XE_STATS/CONFIG_DEBUG_FS(Lucas)
v2: add missing docs
    Add boundary checks for stats id and other improvements (Michal)
    Fix build when CONFIG_DRM_XE_STATS is disabled(Matt)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240810191522.18616-1-nirmoy.das@intel.com


Signed-off-by: default avatarNirmoy Das <nirmoy.das@intel.com>
parent 08b5a479
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+1 −0
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@@ -277,6 +277,7 @@ ifeq ($(CONFIG_DEBUG_FS),y)
	xe-y += xe_debugfs.o \
		xe_gt_debugfs.o \
		xe_gt_sriov_vf_debugfs.o \
		xe_gt_stats.o \
		xe_guc_debugfs.o \
		xe_huc_debugfs.o \
		xe_uc_debugfs.o
+2 −0
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@@ -17,6 +17,7 @@
#include "xe_gt_mcr.h"
#include "xe_gt_sriov_pf_debugfs.h"
#include "xe_gt_sriov_vf_debugfs.h"
#include "xe_gt_stats.h"
#include "xe_gt_topology.h"
#include "xe_hw_engine.h"
#include "xe_lrc.h"
@@ -286,6 +287,7 @@ static const struct drm_info_list debugfs_list[] = {
	{"default_lrc_bcs", .show = xe_gt_debugfs_simple_show, .data = bcs_default_lrc},
	{"default_lrc_vcs", .show = xe_gt_debugfs_simple_show, .data = vcs_default_lrc},
	{"default_lrc_vecs", .show = xe_gt_debugfs_simple_show, .data = vecs_default_lrc},
	{"stats", .show = xe_gt_debugfs_simple_show, .data = xe_gt_stats_print_info},
};

void xe_gt_debugfs_register(struct xe_gt *gt)
+48 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: MIT
/*
 * Copyright © 2024 Intel Corporation
 */

#include <linux/atomic.h>

#include <drm/drm_print.h>

#include "xe_gt.h"
#include "xe_gt_stats.h"

/**
 * xe_gt_stats_incr - Increments the specified stats counter
 * @gt: graphics tile
 * @id: xe_gt_stats_id type id that needs to be incremented
 * @incr: value to be incremented with
 *
 * Increments the specified stats counter.
 */
void xe_gt_stats_incr(struct xe_gt *gt, const enum xe_gt_stats_id id, int incr)
{
	if (id >= __XE_GT_STATS_NUM_IDS)
		return;

	atomic_add(incr, &gt->stats.counters[id]);
}

static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = {
};

/**
 * xe_gt_stats_print_info - Print the GT stats
 * @gt: graphics tile
 * @p: drm_printer where it will be printed out.
 *
 * This prints out all the available GT stats.
 */
int xe_gt_stats_print_info(struct xe_gt *gt, struct drm_printer *p)
{
	enum xe_gt_stats_id id;

	for (id = 0; id < __XE_GT_STATS_NUM_IDS; ++id)
		drm_printf(p, "%s: %d\n", stat_description[id],
			   atomic_read(&gt->stats.counters[id]));

	return 0;
}
+28 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2024 Intel Corporation
 */

#ifndef _XE_GT_STATS_H_
#define _XE_GT_STATS_H_

struct xe_gt;
struct drm_printer;

enum xe_gt_stats_id {
	/* must be the last entry */
	__XE_GT_STATS_NUM_IDS,
};

#ifdef CONFIG_DEBUG_FS
int xe_gt_stats_print_info(struct xe_gt *gt, struct drm_printer *p);
void xe_gt_stats_incr(struct xe_gt *gt, const enum xe_gt_stats_id id, int incr);
#else
static inline void
xe_gt_stats_incr(struct xe_gt *gt, const enum xe_gt_stats_id id,
		 int incr)
{
}

#endif
#endif
+9 −0
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@@ -10,6 +10,7 @@
#include "xe_gt_idle_types.h"
#include "xe_gt_sriov_pf_types.h"
#include "xe_gt_sriov_vf_types.h"
#include "xe_gt_stats.h"
#include "xe_hw_engine_types.h"
#include "xe_hw_fence_types.h"
#include "xe_oa.h"
@@ -133,6 +134,14 @@ struct xe_gt {
		u8 has_indirect_ring_state:1;
	} info;

#if IS_ENABLED(CONFIG_DEBUG_FS)
	/** @stats: GT stats */
	struct {
		/** @stats.counters: counters for various GT stats */
		atomic_t counters[__XE_GT_STATS_NUM_IDS];
	} stats;
#endif

	/**
	 * @mmio: mmio info for GT.  All GTs within a tile share the same
	 * register space, but have their own copy of GSI registers at a