Commit b0953985 authored by Simona Vetter's avatar Simona Vetter
Browse files

Merge tag 'drm-misc-fixes-2025-10-30' of... 

Merge tag 'drm-misc-fixes-2025-10-30' of https://gitlab.freedesktop.org/drm/misc/kernel

 into drm-fixes

Short summary of fixes pull:

ast:
- Preserve correct bits on register I/O

dma-fence:
- Use correct timeline name

etnaviv:
- Use correct GPU adress space for flush

imx:
- parallel-display: Fix bridge handling

nouveau:
- Fix locking in scheduler

panel:
- kingdisplay-kd097d04: Disable EOT packet
- sitronix-st7789v: Use correct SYNC flags

sched:
- Fix locking to avoid race condition
- Fix SIGKILL handling

sysfb:
- Avoid NULL-pointer access

Signed-off-by: default avatarSimona Vetter <simona.vetter@ffwll.ch>
From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patch.msgid.link/20251030195644.GA188441@localhost.localdomain
parents e28e383d a9fb41b5

drivers/dma-buf/dma-fence.c

+1 −1
Original line number Diff line number Diff line
@@ -1141,7 +1141,7 @@ const char __rcu *dma_fence_timeline_name(struct dma_fence *fence) 
			 "RCU protection is required for safe access to returned string");



	if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))

		return fence->ops->get_driver_name(fence);

		return fence->ops->get_timeline_name(fence);

	else

		return "signaled-timeline";

}

drivers/gpu/drm/ast/ast_drv.h

+4 −4
Original line number Diff line number Diff line
@@ -282,13 +282,13 @@ static inline void __ast_write8_i(void __iomem *addr, u32 reg, u8 index, u8 val) 
	__ast_write8(addr, reg + 1, val);

}



static inline void __ast_write8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask,

static inline void __ast_write8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 preserve_mask,

					 u8 val)

{

	u8 tmp = __ast_read8_i_masked(addr, reg, index, read_mask);

	u8 tmp = __ast_read8_i_masked(addr, reg, index, preserve_mask);



	tmp |= val;

	__ast_write8_i(addr, reg, index, tmp);

	val &= ~preserve_mask;

	__ast_write8_i(addr, reg, index, tmp | val);

}



static inline u32 ast_read32(struct ast_device *ast, u32 reg)

drivers/gpu/drm/drm_gem_atomic_helper.c

+6 −2
Original line number Diff line number Diff line
@@ -310,8 +310,12 @@ EXPORT_SYMBOL(drm_gem_destroy_shadow_plane_state); 
void __drm_gem_reset_shadow_plane(struct drm_plane *plane,

				  struct drm_shadow_plane_state *shadow_plane_state)

{

	if (shadow_plane_state) {

		__drm_atomic_helper_plane_reset(plane, &shadow_plane_state->base);

		drm_format_conv_state_init(&shadow_plane_state->fmtcnv_state);

	} else {

		__drm_atomic_helper_plane_reset(plane, NULL);

	}

}

EXPORT_SYMBOL(__drm_gem_reset_shadow_plane);

drivers/gpu/drm/etnaviv/etnaviv_buffer.c

+1 −1
Original line number Diff line number Diff line
@@ -347,7 +347,7 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state, 
	u32 link_target, link_dwords;

	bool switch_context = gpu->exec_state != exec_state;

	bool switch_mmu_context = gpu->mmu_context != mmu_context;

	unsigned int new_flush_seq = READ_ONCE(gpu->mmu_context->flush_seq);

	unsigned int new_flush_seq = READ_ONCE(mmu_context->flush_seq);

	bool need_flush = switch_mmu_context || gpu->flush_seq != new_flush_seq;

	bool has_blt = !!(gpu->identity.minor_features5 &

			  chipMinorFeatures5_BLT_ENGINE);

drivers/gpu/drm/imx/ipuv3/parallel-display.c

+9 −9
Original line number Diff line number Diff line
@@ -25,19 +25,18 @@ 


struct imx_parallel_display_encoder {

	struct drm_encoder encoder;

	struct drm_bridge bridge;

	struct imx_parallel_display *pd;

};



struct imx_parallel_display {

	struct device *dev;

	u32 bus_format;

	struct drm_bridge *next_bridge;

	struct drm_bridge bridge;

};



static inline struct imx_parallel_display *bridge_to_imxpd(struct drm_bridge *b)

{

	return container_of(b, struct imx_parallel_display_encoder, bridge)->pd;

	return container_of(b, struct imx_parallel_display, bridge);

}



static const u32 imx_pd_bus_fmts[] = {
@@ -195,15 +194,13 @@ static int imx_pd_bind(struct device *dev, struct device *master, void *data) 
	if (IS_ERR(imxpd_encoder))

		return PTR_ERR(imxpd_encoder);



	imxpd_encoder->pd = imxpd;

	encoder = &imxpd_encoder->encoder;

	bridge = &imxpd_encoder->bridge;

	bridge = &imxpd->bridge;



	ret = imx_drm_encoder_parse_of(drm, encoder, imxpd->dev->of_node);

	if (ret)

		return ret;



	bridge->funcs = &imx_pd_bridge_funcs;

	drm_bridge_attach(encoder, bridge, NULL, DRM_BRIDGE_ATTACH_NO_CONNECTOR);



	connector = drm_bridge_connector_init(drm, encoder);
@@ -228,9 +225,10 @@ static int imx_pd_probe(struct platform_device *pdev) 
	u32 bus_format = 0;

	const char *fmt;



	imxpd = devm_kzalloc(dev, sizeof(*imxpd), GFP_KERNEL);

	if (!imxpd)

		return -ENOMEM;

	imxpd = devm_drm_bridge_alloc(dev, struct imx_parallel_display, bridge,

				      &imx_pd_bridge_funcs);

	if (IS_ERR(imxpd))

		return PTR_ERR(imxpd);



	/* port@1 is the output port */

	imxpd->next_bridge = devm_drm_of_get_bridge(dev, np, 1, 0);
@@ -258,6 +256,8 @@ static int imx_pd_probe(struct platform_device *pdev) 


	platform_set_drvdata(pdev, imxpd);



	devm_drm_bridge_add(dev, &imxpd->bridge);



	return component_add(dev, &imx_pd_ops);

}