Commit b1f70410 authored by Aradhya Bhatia's avatar Aradhya Bhatia Committed by Lucas De Marchi
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drm/xe/xe2hpg: Add Wa_22021007897 



Add Wa_22021007897 for the Xe2_HPG (graphics version: 20.01) IP. It is
a permanent workaround, and applicable on all the steppings.

Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: default avatarTejas Upadhyay <tejas.upadhyay@intel.com>
Signed-off-by: default avatarAradhya Bhatia <aradhya.bhatia@intel.com>
Link: https://lore.kernel.org/r/20250512065004.2576-1-aradhya.bhatia@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
(cherry picked from commit e5c13e2c)
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent 2d2f82e1

drivers/gpu/drm/xe/regs/xe_gt_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -157,6 +157,7 @@ 
#define XEHPG_SC_INSTDONE_EXTRA2		XE_REG_MCR(0x7108)



#define COMMON_SLICE_CHICKEN4			XE_REG(0x7300, XE_REG_OPTION_MASKED)

#define   SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE	REG_BIT(12)

#define   DISABLE_TDC_LOAD_BALANCING_CALC	REG_BIT(6)



#define COMMON_SLICE_CHICKEN3				XE_REG(0x7304, XE_REG_OPTION_MASKED)

drivers/gpu/drm/xe/xe_wa.c

+4 −0
Original line number Diff line number Diff line
@@ -815,6 +815,10 @@ static const struct xe_rtp_entry_sr lrc_was[] = { 
	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))

	},

	{ XE_RTP_NAME("22021007897"),

	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))

	},



	/* Xe3_LPG */

	{ XE_RTP_NAME("14021490052"),