Commit b228501f authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm: merge dpu format database to MDP formats 



Finally remove duplication between DPU and generic MDP code by merging
DPU format lists to the MDP format database.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/590435/
Link: https://lore.kernel.org/r/20240420-dpu-format-v2-8-9e93226cbffd@linaro.org
parent f4f39207

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

+2 −2
Original line number Diff line number Diff line
@@ -274,7 +274,7 @@ static void dpu_encoder_phys_vid_setup_timing_engine( 


	drm_mode_to_intf_timing_params(phys_enc, &mode, &timing_params);



	fmt = dpu_get_dpu_format(fmt_fourcc);

	fmt = phys_enc->dpu_kms->base.funcs->get_format(&phys_enc->dpu_kms->base, fmt_fourcc, 0);

	DPU_DEBUG_VIDENC(phys_enc, "fmt_fourcc 0x%X\n", fmt_fourcc);



	if (phys_enc->hw_cdm)
@@ -414,7 +414,7 @@ static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc) 


	ctl = phys_enc->hw_ctl;

	fmt_fourcc = dpu_encoder_get_drm_fmt(phys_enc);

	fmt = dpu_get_dpu_format(fmt_fourcc);

	fmt = phys_enc->dpu_kms->base.funcs->get_format(&phys_enc->dpu_kms->base, fmt_fourcc, 0);



	DPU_DEBUG_VIDENC(phys_enc, "\n");

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

+4 −3
Original line number Diff line number Diff line
@@ -326,7 +326,8 @@ static void dpu_encoder_phys_wb_setup( 


	wb_job = wb_enc->wb_job;

	format = msm_framebuffer_format(wb_enc->wb_job->fb);

	dpu_fmt = dpu_get_dpu_format_ext(format->pixel_format, wb_job->fb->modifier);

	dpu_fmt = phys_enc->dpu_kms->base.funcs->get_format(&phys_enc->dpu_kms->base,

							    format->pixel_format, wb_job->fb->modifier);



	DPU_DEBUG("[mode_set:%d, \"%s\",%d,%d]\n",

			hw_wb->idx - WB_0, mode.name,
@@ -576,7 +577,7 @@ static void dpu_encoder_phys_wb_prepare_wb_job(struct dpu_encoder_phys *phys_enc 


	format = msm_framebuffer_format(job->fb);



	wb_cfg->dest.format = dpu_get_dpu_format_ext(

	wb_cfg->dest.format = phys_enc->dpu_kms->base.funcs->get_format(&phys_enc->dpu_kms->base,

					     format->pixel_format, job->fb->modifier);

	if (!wb_cfg->dest.format) {

		/* this error should be detected during atomic_check */

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

+0 −602

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h

+0 −23
Original line number Diff line number Diff line
@@ -9,17 +9,6 @@ 
#include "msm_gem.h"

#include "dpu_hw_mdss.h"



/**

 * dpu_get_dpu_format_ext() - Returns dpu format structure pointer.

 * @format:          DRM FourCC Code

 * @modifiers:       format modifier array from client, one per plane

 */

const struct msm_format *dpu_get_dpu_format_ext(

		const uint32_t format,

		const uint64_t modifier);



#define dpu_get_dpu_format(f) dpu_get_dpu_format_ext(f, 0)



/**

 * dpu_find_format - validate if the pixel format is supported

 * @format:		dpu format
@@ -42,18 +31,6 @@ static inline bool dpu_find_format(u32 format, const u32 *supported_formats, 
	return false;

}



/**

 * dpu_get_msm_format - get an msm_format by its msm_format base

 *                     callback function registers with the msm_kms layer

 * @kms:             kms driver

 * @format:          DRM FourCC Code

 * @modifiers:       data layout modifier

 */

const struct msm_format *dpu_get_msm_format(

		struct msm_kms *kms,

		const uint32_t format,

		const uint64_t modifiers);



/**

 * dpu_format_check_modified_format - validate format and buffers for

 *                   dpu non-standard, i.e. modified format

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h

+0 −10
Original line number Diff line number Diff line
@@ -270,16 +270,6 @@ enum dpu_vbif { 
	VBIF_MAX,

};



/**

 * DPU HW,Component order color map

 */

enum {

	C0_G_Y = 0,

	C1_B_Cb = 1,

	C2_R_Cr = 2,

	C3_ALPHA = 3

};



/**

 * enum dpu_3d_blend_mode

 * Desribes how the 3d data is blended